Digital-Signal-Processor-Design-in-FPGA

所属分类:VHDL/FPGA/Verilog
开发工具:HTML
文件大小:4821KB
下载次数:0
上传日期:2016-09-30 04:12:14
上 传 者sh-1993
说明:  数字信号处理器的FPGA设计,,
(Digital-Signal-Processor-Design-in-FPGA,,)

文件列表:
DigitalSignalProcessor (0, 2016-09-30)
DigitalSignalProcessor\.lso (5, 2016-09-30)
DigitalSignalProcessor\ALU.cmd_log (219, 2016-09-30)
DigitalSignalProcessor\ALU.tfi (158, 2016-09-30)
DigitalSignalProcessor\ALU.v (723, 2016-09-30)
DigitalSignalProcessor\ALU_Unit.cmd_log (234, 2016-09-30)
DigitalSignalProcessor\ALU_Unit.v (3174, 2016-09-30)
DigitalSignalProcessor\AND_Gate.v (640, 2016-09-30)
DigitalSignalProcessor\Arithmetic_Right_Shift.v (656, 2016-09-30)
DigitalSignalProcessor\CLA8bit.v (1838, 2016-09-30)
DigitalSignalProcessor\Complement.v (617, 2016-09-30)
DigitalSignalProcessor\DeMux1to16.v (1328, 2016-09-30)
DigitalSignalProcessor\Decrement.v (594, 2016-09-30)
DigitalSignalProcessor\DigitalSignalProcessor.gise (13965, 2016-09-30)
DigitalSignalProcessor\DigitalSignalProcessor.xise (42414, 2016-09-30)
DigitalSignalProcessor\DigitalSignalProcessor_ucf.ucf (1362, 2016-09-30)
DigitalSignalProcessor\HextoASCII.cmd_log (240, 2016-09-30)
DigitalSignalProcessor\HextoASCII.v (1276, 2016-09-30)
DigitalSignalProcessor\Increment.v (593, 2016-09-30)
DigitalSignalProcessor\Interface.cmd_log (237, 2016-09-30)
DigitalSignalProcessor\Interface.v (8162, 2016-09-30)
DigitalSignalProcessor\Interface_summary.html (4110, 2016-09-30)
DigitalSignalProcessor\Left_Shift.v (630, 2016-09-30)
DigitalSignalProcessor\Multiplier8bit.v (691, 2016-09-30)
DigitalSignalProcessor\Mux16to1.v (1300, 2016-09-30)
DigitalSignalProcessor\NAND_Gate.v (645, 2016-09-30)
DigitalSignalProcessor\NOR_Gate.v (643, 2016-09-30)
DigitalSignalProcessor\OR_Gate.v (638, 2016-09-30)
DigitalSignalProcessor\Processor.cmd_log (474, 2016-09-30)
DigitalSignalProcessor\Processor.tfi (244, 2016-09-30)
DigitalSignalProcessor\Processor.v (2064, 2016-09-30)
DigitalSignalProcessor\Right_Shift.v (632, 2016-09-30)
DigitalSignalProcessor\Subtractor8bit.v (755, 2016-09-30)
DigitalSignalProcessor\XOR_gate.v (660, 2016-09-30)
DigitalSignalProcessor\_ngo (0, 2016-09-30)
DigitalSignalProcessor\_ngo\netlist.lst (91, 2016-09-30)
DigitalSignalProcessor\_xmsgs (0, 2016-09-30)
DigitalSignalProcessor\_xmsgs\bitgen.xmsgs (23715, 2016-09-30)
DigitalSignalProcessor\_xmsgs\map.xmsgs (25325, 2016-09-30)
... ...

# Digital-Signal-Processor-Design-in-FPGA ##Description A digital signal processor designed in FPGA in verilog with ps2 keyboard interfacing to take inputs and LCD interfacing to display the result. Various algorithms of digital signal processing like Fast Fourier Transform and Multiply and Accumulate implemented along with construction of ALU and control unit. ##RTL schematic of top level block ![dsp](https://cloud.githubusercontent.com/assets/20043960/18***0342/0c61661a-86f3-11e6-***4b-c6bff9d97620.PNG)

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