xiayuwen
所属分类：VHDL/FPGA/Verilog
开发工具：VHDL
文件大小：49KB
下载次数：15
上传日期：2011-04-02 18:14:37
上 传 者：
wjw576657631
说明： 本程序是夏宇闻老师的verilog数字系统设计教程中的E2PROM完整程序文件，包括信号产生模块，E2PROM读写模块，E2PROM模拟模块，并且在ＩＳＥ上运行成功，测试正确，modelsim仿真成功
(This program is the Xia Yu Wen digital system design tutorial E2PROM complete file, including the signal generation module, E2PROM reader module, E2PROM simulation module, and run successfully on the ISE, the test correctly, modelsim simulation success)
文件列表:
work\@e@e@p@r@o@m\verilog.asm (34997, 2011-03-29)
work\@e@e@p@r@o@m\_primary.dat (3009, 2011-03-29)
work\@e@e@p@r@o@m\_primary.vhd (865, 2011-03-29)
work\@e@e@p@r@o@m_@w@r\verilog.asm (81916, 2011-03-29)
work\@e@e@p@r@o@m_@w@r\_primary.dat (6893, 2011-03-29)
work\@e@e@p@r@o@m_@w@r\_primary.vhd (2087, 2011-03-29)
work\@signal\verilog.asm (19780, 2011-03-29)
work\@signal\_primary.dat (1802, 2011-03-29)
work\@signal\_primary.vhd (492, 2011-03-29)
work\@top\verilog.asm (5141, 2011-03-29)
work\@top\_primary.dat (681, 2011-03-29)
work\@top\_primary.vhd (126, 2011-03-29)
work\_info (741, 2011-03-29)
addr.dat (765, 2011-03-28)
data.dat (540, 2011-03-28)
eeprom.dat (66, 2011-03-29)
eeprom.v (3237, 2011-03-29)
eeprom_wr.v (10025, 2011-03-30)
modelsim.ini (28731, 2011-03-29)
signal.v (2159, 2011-03-29)
top.v (515, 2011-03-29)
transcript (419, 2011-04-01)
work\@e@e@p@r@o@m (0, 2011-03-29)
work\@e@e@p@r@o@m_@w@r (0, 2011-03-29)
work\@signal (0, 2011-03-29)
work\@top (0, 2011-03-29)
work\_temp (0, 2011-03-29)
work (0, 2011-03-29)
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