UART_TX

所属分类:VHDL/FPGA/Verilog
开发工具:VHDL
文件大小:3KB
下载次数:11
上传日期:2017-01-10 10:28:29
上 传 者霄汉昊伟
说明:  verilog写的串口发送程序,具有单字节发送和多字节发送功能,附带testbench,可自行验证
(verilog write serial transmission program, sending a single byte and multi-byte transmit function, with testbench, can verify their own)

文件列表:
rtl\key_filter.v (2557, 2016-09-20)
rtl\UART_TOP.v (638, 2016-10-13)
rtl\UART_TOP.v.bak (283, 2016-09-20)
rtl\UART_TX.v (2786, 2016-10-13)
rtl\UART_TX.v.bak (7, 2016-09-19)
rtl\UART_TX_tb.v (888, 2016-09-20)
rtl (0, 2017-01-10)

近期下载者

相关文件


收藏者