文件列表:

Coregen (0, 2014-02-18)
Coregen\coregen.cgp (511, 2014-02-18)
Coregen\fifo_generator_v9_3.xco (7142, 2014-02-18)
EDK (0, 2014-02-18)
EDK\data (0, 2014-02-18)
EDK\data\ps7_constraints.ucf (13015, 2014-02-18)
EDK\data\ps7_system_prj.xml (13184, 2014-02-18)
EDK\data\system.ucf (711, 2014-02-18)
EDK\etc (0, 2014-02-18)
EDK\etc\bitgen.ut (39, 2014-02-18)
EDK\etc\download.cmd (109, 2014-02-18)
EDK\etc\fast_runtime.opt (2794, 2014-02-18)
EDK\pcores (0, 2014-02-18)
EDK\pcores\axi_fifo_loopback_v1_00_a (0, 2014-02-18)
EDK\pcores\axi_fifo_loopback_v1_00_a\data (0, 2014-02-18)
EDK\pcores\axi_fifo_loopback_v1_00_a\data\axi_fifo_loopback_v2_1_0.bbd (30, 2014-02-18)
EDK\pcores\axi_fifo_loopback_v1_00_a\data\axi_fifo_loopback_v2_1_0.mpd (1760, 2014-02-18)
EDK\pcores\axi_fifo_loopback_v1_00_a\data\axi_fifo_loopback_v2_1_0.pao (492, 2014-02-18)
EDK\pcores\axi_fifo_loopback_v1_00_a\hdl (0, 2014-02-18)
EDK\pcores\axi_fifo_loopback_v1_00_a\hdl\vhdl (0, 2014-02-18)
EDK\pcores\axi_fifo_loopback_v1_00_a\hdl\vhdl\axi_fifo_loopback.vhd (7093, 2014-02-18)
EDK\system.mhs (8349, 2014-02-18)
EDK\system.xmp (514, 2014-02-18)
SDK (0, 2014-02-18)
SDK\dma_test (0, 2014-02-18)
SDK\dma_test\.cproject (15583, 2014-02-18)
SDK\dma_test\.project (775, 2014-02-18)
SDK\dma_test\src (0, 2014-02-18)
SDK\dma_test\src\helloworld.c (6382, 2014-02-18)
SDK\dma_test\src\lscript.ld (6259, 2014-02-18)
SDK\dma_test\src\platform.c (3725, 2014-02-18)
SDK\dma_test\src\platform.h (952, 2014-02-18)
SDK\dma_test\src\platform_config.h (182, 2014-02-18)
SDK\dma_test_bsp (0, 2014-02-18)
SDK\dma_test_bsp\.cproject (739, 2014-02-18)
SDK\dma_test_bsp\.project (2417, 2014-02-18)
... ...

zc706-axi-dma-fifo ================== Example project that uses the AXI DMA peripheral to connect a custom AXI-Stream peripheral to memory ### Description This type of design is typical for applications where there is a data source that constantly generates data (for example, an ADC) and we wish to store this data in a memory mapped storage device (for example SDRAM). The design can also be used for the reverse case, where we have data in memory and we would like to send that data as a stream to some external device (for example a DAC). The AXI DMA peripheral allows us to feed in an AXI-Stream, and have that data transferred to a specific address on the memory map. It also allows us to do the reverse, which is to transfer data from a specific address to an AXI stream. The processor determines the address to store the data or the address of the data to send. The custom AXI-Stream peripheral has one master and one slave AXI-Stream port and contains an AXI-Stream FIFO. The data pushed into the slave interface can then be read out of the master interface. ### Requirements * ISE Design Suite 14.7 * ZC706 Evaluation Board ### License Feel free to modify the custom AXI-Stream peripheral for your specific application. ### Fork and share If you port this project to another hardware platform, please send me the code or push it onto GitHub and send me the link so I can post it on my website. The more people that benefit, the better. ### About the author I'm an FPGA consultant and I provide FPGA design services and training to innovative companies around the world. I believe in sharing knowledge and I regularly contribute to the open source community. Jeff Johnson http://www.fpgadeveloper.com

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