SDRAM-Verilog-HDL 联合开发网

Pudn.com > 下载中心 > VHDL/FPGA/Verilog > SDRAM-Verilog-HDL

SDRAM-Verilog-HDL

sdram VERILOG SDRAM SDRAM Controller Verilog HDL sdram verilog

所属分类：VHDL/FPGA/Verilog
开发工具：Windows_Unix
文件大小：703KB
下载次数：15
上传日期：2011-04-14 16:02:21
上传者：changlichao

说明： SDRAM控制器Verilog HDL-source-code.rar
(SDRAM-controller-Verilog HDL-source-code.rar)

文件列表:

SDRAM控制器Verilog HDL源码\sdr_sdram.pdf (917283, 2002-09-02)
SDRAM控制器Verilog HDL源码\simulation\sdr_sdram_tb.v (22444, 2000-07-12)
SDRAM控制器Verilog HDL源码\source\altclklock.v (8543, 2000-06-12)
SDRAM控制器Verilog HDL源码\source\Command.v (17328, 2000-07-28)
SDRAM控制器Verilog HDL源码\source\compile_all.v (206, 2000-05-19)
SDRAM控制器Verilog HDL源码\source\control_interface.v (8463, 2000-07-28)
SDRAM控制器Verilog HDL源码\source\Params.v (935, 2000-07-06)
SDRAM控制器Verilog HDL源码\source\PLL1.v (4754, 2000-05-23)
SDRAM控制器Verilog HDL源码\source\sdr_data_path.v (2747, 2000-07-28)
SDRAM控制器Verilog HDL源码\source\sdr_sdram.v (6942, 2000-07-28)
SDRAM控制器Verilog HDL源码\使用说明请参看右侧注释====〉〉.txt (774, 2008-01-28)
SDRAM控制器Verilog HDL源码\doc (0, 2002-09-11)
SDRAM控制器Verilog HDL源码\simulation (0, 2002-09-11)
SDRAM控制器Verilog HDL源码\source (0, 2002-09-11)
SDRAM控制器Verilog HDL源码 (0, 2008-10-13)

SDR SDRAM Controller v1.1 readme.txt This readme file for the SDR SDRAM Controller includes information that was not incorporated into the SDR SDRAM Controller White Paper v1.1. The PLL is targeted at APEX(TM) devices. Please regenerate for your chosen architecture. Last updated September, 2002 Copyright 2002 Altera Corporation. All rights reserved.

近期下载者：

相关文件：

评论：[我要评论] [举报此文件]

收藏者：