说明：  本文首先介绍了JTAG标准和SoC调试技术，研究了基于JTAG的多核SoC调试结构，优化了一种全兼容多核SoC调试结构，使JTAG控制器的互连能配置成多种模式，以实现单核或多核SoC调试；然后在IEEEl 149．1标准的基础上进行了结构化改进，扩展了指令集与寄存器，实现了基于JTAG标准的SoC调试系统；最后进行了SoC调试系统的功能测试与性能分析，测试结果表明本文实现的SoC调试系统比现有的同类调试工具在功能与性能方面都有明显提高。
(This paper describes the JTAG standard and SoC debugging technology, research-based JTAG debugging multi-core SoC structure, optimized multi-core SoC debugging a fully compliant structure, the JTAG controller can be configured into a variety of interconnect models in order to achieve a single-core or multi-core SoC debugging then IEEEl 149.1 standard structured on the basis of improved, expanded instruction set and registers, to achieve standards-based SoC JTAG debug system Finally, a functional test system SoC debugging and performance analysis The test results show that the implementation of SoC debug system debugging tools than the existing similar in function and performance are improved obviously.)