text
所属分类：VHDL/FPGA/Verilog
开发工具：QT
文件大小：1920KB
下载次数：10
上传日期：2017-04-15 16:53:37
上 传 者：
沉默的卡卡
说明： fpga锁相环实验——锁相环使用，开发环境为Quartus II
(The fpga- phase-locked loop using phase-locked loop experiment, development environment for the Quartus II
)
文件列表:
10_PLL (0, 2016-03-05)
10_PLL\FPGA (0, 2016-03-05)
10_PLL\FPGA\db (0, 2016-03-05)
10_PLL\FPGA\greybox_tmp (0, 2016-03-05)
10_PLL\FPGA\greybox_tmp\cbx_args.txt (1735, 2016-01-06)
10_PLL\FPGA\iCore3.tcl (3567, 2016-01-05)
10_PLL\FPGA\incremental_db (0, 2016-03-05)
10_PLL\FPGA\incremental_db\compiled_partitions (0, 2016-03-05)
10_PLL\FPGA\incremental_db\compiled_partitions\PLL.autoh_e40e1.map.cdb (14977, 2016-01-06)
10_PLL\FPGA\incremental_db\compiled_partitions\PLL.autoh_e40e1.map.dpi (2025, 2016-01-06)
10_PLL\FPGA\incremental_db\compiled_partitions\PLL.autoh_e40e1.map.hdb (30623, 2016-01-06)
10_PLL\FPGA\incremental_db\compiled_partitions\PLL.autoh_e40e1.map.kpt (2710, 2016-01-06)
10_PLL\FPGA\incremental_db\compiled_partitions\PLL.autoh_e40e1.map.logdb (4, 2016-01-06)
10_PLL\FPGA\incremental_db\compiled_partitions\PLL.autos_3e921.map.cdb (37373, 2016-01-06)
10_PLL\FPGA\incremental_db\compiled_partitions\PLL.autos_3e921.map.dpi (8490, 2016-01-06)
10_PLL\FPGA\incremental_db\compiled_partitions\PLL.autos_3e921.map.hdb (45015, 2016-01-06)
10_PLL\FPGA\incremental_db\compiled_partitions\PLL.autos_3e921.map.kpt (11361, 2016-01-06)
10_PLL\FPGA\incremental_db\compiled_partitions\PLL.autos_3e921.map.logdb (4, 2016-01-06)
10_PLL\FPGA\incremental_db\compiled_partitions\PLL.db_info (140, 2016-01-05)
10_PLL\FPGA\incremental_db\compiled_partitions\PLL.root_partition.cmp.ammdb (384, 2016-01-06)
10_PLL\FPGA\incremental_db\compiled_partitions\PLL.root_partition.cmp.cdb (5466, 2016-01-06)
10_PLL\FPGA\incremental_db\compiled_partitions\PLL.root_partition.cmp.dfp (33, 2016-01-06)
10_PLL\FPGA\incremental_db\compiled_partitions\PLL.root_partition.cmp.hdb (43336, 2016-01-06)
10_PLL\FPGA\incremental_db\compiled_partitions\PLL.root_partition.cmp.logdb (4, 2016-01-06)
10_PLL\FPGA\incremental_db\compiled_partitions\PLL.root_partition.cmp.rcfdb (73923, 2016-01-06)
10_PLL\FPGA\incremental_db\compiled_partitions\PLL.root_partition.map.cdb (2658, 2016-01-06)
10_PLL\FPGA\incremental_db\compiled_partitions\PLL.root_partition.map.dpi (5320, 2016-01-06)
10_PLL\FPGA\incremental_db\compiled_partitions\PLL.root_partition.map.hbdb.cdb (2661, 2016-01-06)
10_PLL\FPGA\incremental_db\compiled_partitions\PLL.root_partition.map.hbdb.hb_info (48, 2016-01-06)
10_PLL\FPGA\incremental_db\compiled_partitions\PLL.root_partition.map.hbdb.hdb (44572, 2016-01-06)
10_PLL\FPGA\incremental_db\compiled_partitions\PLL.root_partition.map.hbdb.sig (32, 2016-01-06)
10_PLL\FPGA\incremental_db\compiled_partitions\PLL.root_partition.map.hdb (29914, 2016-01-06)
10_PLL\FPGA\incremental_db\compiled_partitions\PLL.root_partition.map.kpt (207, 2016-01-06)
10_PLL\FPGA\my_pll.qip (0, 2016-01-06)
10_PLL\FPGA\output_files (0, 2016-03-05)
10_PLL\FPGA\output_files\greybox_tmp (0, 2016-03-05)
10_PLL\FPGA\output_files\greybox_tmp\cbx_args.txt (1741, 2016-01-06)
10_PLL\FPGA\output_files\my_pll.qip (0, 2016-01-06)
10_PLL\FPGA\output_files\PLL.asm.rpt (7338, 2016-01-06)
... ...
This folder contains data for incremental compilation.
The compiled_partitions sub-folder contains previous compilation results for each partition.
As long as this folder is preserved, incremental compilation results from earlier compiles
can be re-used. To perform a clean compilation from source files for all partitions, both
the db and incremental_db folder should be removed.
The imported_partitions sub-folder contains the last imported QXP for each imported partition.
As long as this folder is preserved, imported partitions will be automatically re-imported
when the db or incremental_db/compiled_partitions folders are removed.
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