pc_fpga_com_latest.tar
所属分类：VHDL/FPGA/Verilog
开发工具：VHDL
文件大小：183KB
下载次数：6
上传日期：2017-04-26 18:00:04
上 传 者：
亓乂
说明： 用VHDL实现的PC与FPGA之间的网络通信，通过以太网进行通信
(comunicate between PC and FPGA via ethernet)
文件列表:
pc_fpga_com (0, 2017-04-24)
pc_fpga_com\trunk (0, 2017-04-24)
pc_fpga_com\trunk\UDP_IP_CORE_FLEX_Spartan3 (0, 2017-04-24)
pc_fpga_com\trunk\UDP_IP_CORE_FLEX_Spartan3\FLEX_CONTROL.vhd (3422, 2011-03-22)
pc_fpga_com\trunk\UDP_IP_CORE_FLEX_Spartan3\TARGET_EOF.vhd (2431, 2011-03-22)
pc_fpga_com\trunk\UDP_IP_CORE_FLEX_Spartan3\dist_mem_64x8.xco (1817, 2011-03-22)
pc_fpga_com\trunk\UDP_IP_CORE_FLEX_Spartan3\dist_mem_64x8.ngc (14090, 2011-03-22)
pc_fpga_com\trunk\UDP_IP_CORE_FLEX_Spartan3\IPv4_PACKET_RECEIVER.vhd (5068, 2011-03-22)
pc_fpga_com\trunk\UDP_IP_CORE_FLEX_Spartan3\wraddr_lut_mem.ngc (9247, 2011-03-22)
pc_fpga_com\trunk\UDP_IP_CORE_FLEX_Spartan3\IPV4_LUT_INDEXER.vhd (2686, 2011-03-22)
pc_fpga_com\trunk\UDP_IP_CORE_FLEX_Spartan3\comp_11b_equal.ngc (8168, 2011-03-22)
pc_fpga_com\trunk\UDP_IP_CORE_FLEX_Spartan3\REG_16B_WREN.vhd (1268, 2011-03-22)
pc_fpga_com\trunk\UDP_IP_CORE_FLEX_Spartan3\PACKET_RECEIVER_FSM.vhd (5007, 2011-03-22)
pc_fpga_com\trunk\UDP_IP_CORE_FLEX_Spartan3\comp_6b_equal.ngc (4896, 2011-03-22)
pc_fpga_com\trunk\UDP_IP_CORE_FLEX_Spartan3\REG_8b_wren.vhd (1233, 2011-03-22)
pc_fpga_com\trunk\UDP_IP_CORE_FLEX_Spartan3\ALLOW_ZERO_UDP_CHECKSUM.vhd (1304, 2011-03-22)
pc_fpga_com\trunk\UDP_IP_CORE_FLEX_Spartan3\MATCH_CMD.vhd (2171, 2011-03-22)
pc_fpga_com\trunk\UDP_IP_CORE_FLEX_Spartan3\wraddr_lut_mem.xco (1828, 2011-03-22)
pc_fpga_com\trunk\UDP_IP_CORE_FLEX_Spartan3\COUNTER_11B_EN_RECEIV.vhd (1268, 2011-03-22)
pc_fpga_com\trunk\UDP_IP_CORE_FLEX_Spartan3\OVERRIDE_LUT_CONTROL.vhd (3181, 2011-03-22)
pc_fpga_com\trunk\UDP_IP_CORE_FLEX_Spartan3\UDP_IP_Core.vhd (6278, 2011-03-22)
pc_fpga_com\trunk\UDP_IP_CORE_FLEX_Spartan3\ENABLE_USER_DATA_TRANSMISSION.vhd (1584, 2011-03-22)
pc_fpga_com\trunk\UDP_IP_CORE_FLEX_Spartan3\IPV4_PACKET_TRANSMITTER.vhd (20677, 2011-03-22)
pc_fpga_com\trunk\UDP_IP_CORE_FLEX_Spartan3\wraddr_lut_mem.vhd (9681, 2011-03-22)
pc_fpga_com\trunk\UDP_IP_CORE_FLEX_Spartan3\comp_6b_equal.xco (1516, 2011-03-22)
pc_fpga_com\trunk\UDP_IP_CORE_FLEX_Spartan3\CONFIG_CONTROL.vhd (3555, 2011-03-22)
pc_fpga_com\trunk\UDP_IP_CORE_FLEX_Spartan3\comp_6b_equal.vhd (6029, 2011-03-22)
pc_fpga_com\trunk\UDP_IP_CORE_FLEX_Spartan3\comp_11b_equal.vhd (10100, 2011-03-22)
pc_fpga_com\trunk\UDP_IP_CORE_FLEX_Spartan3\dist_mem_64x8.vhd (15279, 2011-03-22)
pc_fpga_com\trunk\UDP_IP_CORE_FLEX_Spartan3\comp_11b_equal.xco (1518, 2011-03-22)
pc_fpga_com\trunk\UDP_IP_CORE_FLEX_Spartan3\COUNTER_6B_LUT_FIFO_MODE.vhd (1418, 2011-03-22)
pc_fpga_com\trunk\UDP_IP_CORE_FLEX_Spartan3\COUNTER_11B_EN_TRANS.vhd (1264, 2011-03-22)
pc_fpga_com\trunk\PC_FPGA_PLATFPORM (0, 2017-04-24)
pc_fpga_com\trunk\PC_FPGA_PLATFPORM\SOFTWARE (0, 2017-04-24)
pc_fpga_com\trunk\PC_FPGA_PLATFPORM\SOFTWARE\fpga_com.h (2137, 2011-03-22)
pc_fpga_com\trunk\PC_FPGA_PLATFPORM\SOFTWARE\background_reader.cpp (13282, 2011-03-22)
pc_fpga_com\trunk\PC_FPGA_PLATFPORM\SOFTWARE\testcase1.cpp (4215, 2011-03-22)
pc_fpga_com\trunk\PC_FPGA_PLATFPORM\SOFTWARE\build.sh (127, 2011-03-22)
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