BASYS-3-Artix-7
所属分类：VHDL/FPGA/Verilog
开发工具：VHDL
文件大小：5035KB
下载次数：3
上传日期：2017-05-02 15:57:17
上 传 者：
Mick
说明： 使用BASYS 3 Artix-7 FPGA设计数字系统和数字逻辑的VHDL代码
(VHDL code for designing digital systems and digital logic using the BASYS 3 Artix-7 FPGA)
文件列表:
BASYS_Board_Projects (0, 2016-05-16)
BASYS_Board_Projects\8-4-2-1_BCD_Code_Converter (0, 2016-05-16)
BASYS_Board_Projects\8-4-2-1_BCD_Code_Converter\Basys3_Master.xdc (12909, 2016-05-16)
BASYS_Board_Projects\8-4-2-1_BCD_Code_Converter\Lab3_LogicCircuit.vds (25775, 2016-05-16)
BASYS_Board_Projects\8-4-2-1_BCD_Code_Converter\Lab3_LogicCircuit.vhd (3777, 2016-05-16)
BASYS_Board_Projects\8-4-2-1_BCD_Code_Converter\Project3.cache (0, 2016-05-16)
BASYS_Board_Projects\8-4-2-1_BCD_Code_Converter\Project3.cache\wt (0, 2016-05-16)
BASYS_Board_Projects\8-4-2-1_BCD_Code_Converter\Project3.cache\wt\java_command_handlers.wdf (417, 2016-05-16)
BASYS_Board_Projects\8-4-2-1_BCD_Code_Converter\Project3.cache\wt\project.wpc (59, 2016-05-16)
BASYS_Board_Projects\8-4-2-1_BCD_Code_Converter\Project3.cache\wt\synthesis.wdf (3735, 2016-05-16)
BASYS_Board_Projects\8-4-2-1_BCD_Code_Converter\Project3.cache\wt\synthesis_details.wdf (97, 2016-05-16)
BASYS_Board_Projects\8-4-2-1_BCD_Code_Converter\Project3.cache\wt\webtalk_pa.xml (1518, 2016-05-16)
BASYS_Board_Projects\8-4-2-1_BCD_Code_Converter\Project3.hw (0, 2016-05-16)
BASYS_Board_Projects\8-4-2-1_BCD_Code_Converter\Project3.hw\Project3.lpr (335, 2016-05-16)
BASYS_Board_Projects\8-4-2-1_BCD_Code_Converter\Project3.hw\hw_1 (0, 2016-05-16)
BASYS_Board_Projects\8-4-2-1_BCD_Code_Converter\Project3.hw\hw_1\hw.xml (670, 2016-05-16)
BASYS_Board_Projects\8-4-2-1_BCD_Code_Converter\Project3.hw\webtalk (0, 2016-05-16)
BASYS_Board_Projects\8-4-2-1_BCD_Code_Converter\Project3.hw\webtalk\.xsim_webtallk.info (54, 2016-05-16)
BASYS_Board_Projects\8-4-2-1_BCD_Code_Converter\Project3.hw\webtalk\labtool_webtalk.log (368, 2016-05-16)
BASYS_Board_Projects\8-4-2-1_BCD_Code_Converter\Project3.hw\webtalk\usage_statistics_ext_labtool.html (2847, 2016-05-16)
BASYS_Board_Projects\8-4-2-1_BCD_Code_Converter\Project3.hw\webtalk\usage_statistics_ext_labtool.xml (2419, 2016-05-16)
BASYS_Board_Projects\8-4-2-1_BCD_Code_Converter\Project3.rar (114837, 2016-05-16)
BASYS_Board_Projects\8-4-2-1_BCD_Code_Converter\Project3.runs (0, 2016-05-16)
BASYS_Board_Projects\8-4-2-1_BCD_Code_Converter\Project3.runs\.jobs (0, 2016-05-16)
BASYS_Board_Projects\8-4-2-1_BCD_Code_Converter\Project3.runs\.jobs\vrs_config_1.xml (204, 2016-05-16)
BASYS_Board_Projects\8-4-2-1_BCD_Code_Converter\Project3.runs\.jobs\vrs_config_10.xml (215, 2016-05-16)
BASYS_Board_Projects\8-4-2-1_BCD_Code_Converter\Project3.runs\.jobs\vrs_config_11.xml (229, 2016-05-16)
BASYS_Board_Projects\8-4-2-1_BCD_Code_Converter\Project3.runs\.jobs\vrs_config_12.xml (215, 2016-05-16)
BASYS_Board_Projects\8-4-2-1_BCD_Code_Converter\Project3.runs\.jobs\vrs_config_13.xml (229, 2016-05-16)
BASYS_Board_Projects\8-4-2-1_BCD_Code_Converter\Project3.runs\.jobs\vrs_config_14.xml (236, 2016-05-16)
BASYS_Board_Projects\8-4-2-1_BCD_Code_Converter\Project3.runs\.jobs\vrs_config_15.xml (229, 2016-05-16)
BASYS_Board_Projects\8-4-2-1_BCD_Code_Converter\Project3.runs\.jobs\vrs_config_16.xml (215, 2016-05-16)
BASYS_Board_Projects\8-4-2-1_BCD_Code_Converter\Project3.runs\.jobs\vrs_config_17.xml (229, 2016-05-16)
BASYS_Board_Projects\8-4-2-1_BCD_Code_Converter\Project3.runs\.jobs\vrs_config_18.xml (236, 2016-05-16)
BASYS_Board_Projects\8-4-2-1_BCD_Code_Converter\Project3.runs\.jobs\vrs_config_19.xml (244, 2016-05-16)
BASYS_Board_Projects\8-4-2-1_BCD_Code_Converter\Project3.runs\.jobs\vrs_config_2.xml (218, 2016-05-16)
BASYS_Board_Projects\8-4-2-1_BCD_Code_Converter\Project3.runs\.jobs\vrs_config_20.xml (258, 2016-05-16)
BASYS_Board_Projects\8-4-2-1_BCD_Code_Converter\Project3.runs\.jobs\vrs_config_21.xml (265, 2016-05-16)
BASYS_Board_Projects\8-4-2-1_BCD_Code_Converter\Project3.runs\.jobs\vrs_config_3.xml (225, 2016-05-16)
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# DIGITAL_LOGIC_DESIGN
VHDL code for designing digital systems and digital logic
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