说明：  首先要知道自己在干什么？数字电路(fpga/asic)设计就是逻辑电路的实现，这样子说太窄了，因为asic还有不少是模拟的，呵呵。我们这里只讨论数字电路设计。实际上就是如何把我们从课堂上学到的逻辑电路使用原理图(很少有人用这个拉)，或者硬件描述语言(Verilog/VHDL)来实现，或许你觉得这太简单了，其实再复杂的设计也就是用逻辑门电路搭起来的。你学习逻辑电路的时候或许会为卡拉图，触发器状态推倒公式而感到迷惑，但是其实有一点可以放心的是，实际设计中只要求你懂得接口时序和功能就可以了，用不着那么复杂得推倒公式，只要你能够用语言把逻辑关系表述清楚就可以了，具体这个逻辑关系采用什么门电路搭的，可以不关心，综合工具(synthesis tool)可以帮你处理。当然你要知道基本门电路的功能，比如D触发器，与门，非门，或门等的功能(不说多的，两输入的还是比较简单的)。
(First of all to know what you are doing? Digital circuit (fpga/asic) design is the realization of the logic circuit, so that is too narrow, because there are a lot of asic simulation, huh, huh. We only discuss digital circuit design here. Is actually how we use the logic the classroom to use the schematic diagram (very few people use this pull), or hardware description language (Verilog/VHDL) to achieve, perhaps you think this is too simple, in fact, complex design That is, with the logic gate to build up. When you learn the logic of the circuit may be for the Karata, flip-flop state of the formula and feel confused, but in fact there is one thing can be assured that the actual design only requires you to understand the interface timing and function can be, and not so complicated Down the formula, as long as you can use the language to express the logical relationship can be clear, the specific logical relationship with what the door to take, you can not care, comprehensive tools (syn)