kebianjishuqi
所属分类：VHDL/FPGA/Verilog
开发工具：Altium
文件大小：1896KB
下载次数：2
上传日期：2017-05-27 14:17:19
上 传 者：
hehe1995
说明： Verilg HDL语言编写实现进制计数器切换，包括模9、模6、模4、和模8加法计数器，通过按键输入，消抖，数码管显示。开发环境：ISE14.7
(Verilg HDL language to achieve binary counter switch, including die 9, die 6, die 4, and die 8 adder counter, through the key input, eliminate jitter, digital display. Development environment: ISE14.7)
文件列表:
jisuqi (0, 2017-05-23)
jisuqi\.lso (6, 2017-05-23)
jisuqi\_ngo (0, 2017-05-23)
jisuqi\_ngo\netlist.lst (34, 2017-05-23)
jisuqi\_xmsgs (0, 2017-05-23)
jisuqi\_xmsgs\bitgen.xmsgs (367, 2017-05-23)
jisuqi\_xmsgs\map.xmsgs (741, 2017-05-23)
jisuqi\_xmsgs\ngdbuild.xmsgs (367, 2017-05-23)
jisuqi\_xmsgs\par.xmsgs (1726, 2017-05-23)
jisuqi\_xmsgs\pn_parser.xmsgs (740, 2017-05-23)
jisuqi\_xmsgs\trce.xmsgs (1720, 2017-05-23)
jisuqi\_xmsgs\xst.xmsgs (1276, 2017-05-23)
jisuqi\debounce_module.cmd_log (94, 2017-05-23)
jisuqi\debounce_module.lso (6, 2017-05-23)
jisuqi\debounce_module.ngc (24507, 2017-05-23)
jisuqi\debounce_module.ngr (18408, 2017-05-23)
jisuqi\debounce_module.prj (97, 2017-05-23)
jisuqi\debounce_module.stx (0, 2017-05-23)
jisuqi\debounce_module.syr (17650, 2017-05-23)
jisuqi\debounce_module.v (1004, 2017-05-23)
jisuqi\debounce_module.xst (1164, 2017-05-23)
jisuqi\debounce_module_envsettings.html (8882, 2017-05-23)
jisuqi\debounce_module_summary.html (5575, 2017-05-23)
jisuqi\debounce_module_xst.xrpt (13061, 2017-05-23)
jisuqi\delay_module.bmm (0, 2017-05-23)
jisuqi\delay_module.v (1602, 2017-05-23)
jisuqi\detect_module.v (1246, 2017-05-23)
jisuqi\display.v (1291, 2017-05-23)
jisuqi\fuse.log (1045, 2017-05-23)
jisuqi\fuse.xmsgs (367, 2017-05-23)
jisuqi\fuseRelaunch.cmd (206, 2017-05-23)
jisuqi\ipcore_dir (0, 2017-05-23)
jisuqi\iseconfig (0, 2017-05-23)
jisuqi\iseconfig\jisuqi.projectmgr (8624, 2017-05-23)
jisuqi\iseconfig\mo9.xreport (20305, 2017-05-23)
jisuqi\isim (0, 2017-05-23)
jisuqi\isim\isim_usage_statistics.html (474, 2017-05-23)
jisuqi\isim\mo4_test_isim_beh.exe.sim (0, 2017-05-23)
jisuqi\isim\mo4_test_isim_beh.exe.sim\ISimEngine-DesignHierarchy.dbg (4192, 2017-05-23)
jisuqi\isim\mo4_test_isim_beh.exe.sim\isimcrash.log (0, 2017-05-23)
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