Clk_Div
所属分类：VHDL/FPGA/Verilog
开发工具：VHDL
文件大小：360KB
下载次数：17
上传日期：2011-04-18 13:52:51
上 传 者：
sunpei0337115
说明： FPGA分频器的设计，通过修改参数值可以实现各种时钟频率信号。
(Divider FPGA design can be achieved by modifying the parameter values of various clock frequency signal.)
文件列表:
Clk_Div\clk_div.asm.rpt (7646, 2011-04-12)
Clk_Div\clk_div.done (26, 2011-04-12)
Clk_Div\clk_div.eda.rpt (6099, 2011-04-12)
Clk_Div\clk_div.fit.rpt (85796, 2011-04-12)
Clk_Div\clk_div.fit.smsg (513, 2011-04-12)
Clk_Div\clk_div.fit.summary (598, 2011-04-12)
Clk_Div\clk_div.flow.rpt (8278, 2011-04-12)
Clk_Div\clk_div.map.rpt (18017, 2011-04-12)
Clk_Div\clk_div.map.summary (456, 2011-04-12)
Clk_Div\clk_div.pin (27435, 2011-04-12)
Clk_Div\clk_div.pof (524489, 2011-04-12)
Clk_Div\clk_div.qpf (1278, 2011-04-12)
Clk_Div\clk_div.qsf (4585, 2011-04-15)
Clk_Div\clk_div.qws (90, 2011-04-15)
Clk_Div\clk_div.saf (2838, 2011-04-12)
Clk_Div\clk_div.sim.rpt (106770, 2011-04-12)
Clk_Div\clk_div.sof (240790, 2011-04-12)
Clk_Div\clk_div.tan.rpt (26213, 2011-04-12)
Clk_Div\clk_div.tan.summary (1412, 2011-04-12)
Clk_Div\clk_div.v (577, 2011-04-12)
Clk_Div\clk_div.v.bak (571, 2011-04-12)
Clk_Div\clk_div.vwf (2410, 2011-04-12)
Clk_Div\clk_div_nativelink_simulation.rpt (1007, 2011-04-15)
Clk_Div\db\clk_div.(0).cnf.cdb (1422, 2011-04-12)
Clk_Div\db\clk_div.(0).cnf.hdb (739, 2011-04-12)
Clk_Div\db\clk_div.asm.qmsg (2453, 2011-04-12)
Clk_Div\db\clk_div.asm_labs.ddb (3461, 2011-04-12)
Clk_Div\db\clk_div.cbx.xml (89, 2011-04-12)
Clk_Div\db\clk_div.cmp.bpm (454, 2011-04-12)
Clk_Div\db\clk_div.cmp.cdb (4104, 2011-04-12)
Clk_Div\db\clk_div.cmp.ecobp (28, 2011-04-12)
Clk_Div\db\clk_div.cmp.hdb (7335, 2011-04-12)
Clk_Div\db\clk_div.cmp.kpt (338, 2011-04-12)
Clk_Div\db\clk_div.cmp.logdb (4, 2011-04-12)
Clk_Div\db\clk_div.cmp.rdb (16825, 2011-04-12)
Clk_Div\db\clk_div.cmp.tdb (3483, 2011-04-12)
Clk_Div\db\clk_div.cmp0.ddb (49275, 2011-04-12)
Clk_Div\db\clk_div.cmp2.ddb (40449, 2011-04-12)
Clk_Div\db\clk_div.cmp_merge.kpt (344, 2011-04-12)
Clk_Div\db\clk_div.db_info (152, 2011-04-12)
... ...
This folder contains data for incremental compilation.
The compiled_partitions sub-folder contains previous compilation results for each partition.
As long as this folder is preserved, incremental compilation results from earlier compiles
can be re-used. To perform a clean compilation from source files for all partitions, both
the db and incremental_db folder should be removed.
The imported_partitions sub-folder contains the last imported QXP for each imported partition.
As long as this folder is preserved, imported partitions will be automatically re-imported
when the db or incremental_db/compiled_partitions folders are removed.
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