说明：  This demo connects two MSP430 s via the I2C bus. The master reads 5 bytes the slave. This is the MASTER CODE. The data the slave transmitter begins at 0 and increments with each transfer. The USCI_B0 RX interrupt is used to know when new data has been received. ACLK = default REFO ~32768Hz, MCLK = SMCLK = BRCLK = DCODIV ~1MHz.