文件列表:

sin111 (0, 2017-06-13)
sin111\ipcore_dir (0, 2017-06-13)
sin111\ipcore_dir\coregen.cgp (234, 2017-06-13)
sin111\ipcore_dir\coregen.log (2100, 2017-06-13)
sin111\ipcore_dir\create_sin.tcl (1228, 2017-06-13)
sin111\ipcore_dir\create_sin1.tcl (1229, 2017-06-13)
sin111\ipcore_dir\edit_sin.tcl (1115, 2017-06-13)
sin111\ipcore_dir\sin (0, 2017-06-13)
sin111\ipcore_dir\sin.asy (709, 2017-06-13)
sin111\ipcore_dir\sin.gise (1344, 2017-06-13)
sin111\ipcore_dir\sin.ncf (0, 2017-06-13)
sin111\ipcore_dir\sin.ngc (518778, 2017-06-13)
sin111\ipcore_dir\sin.sym (2052, 2017-06-13)
sin111\ipcore_dir\sin.vhd (4781, 2017-06-13)
sin111\ipcore_dir\sin.vho (4529, 2017-06-13)
sin111\ipcore_dir\sin.xco (1913, 2017-06-13)
sin111\ipcore_dir\sin.xise (4974, 2017-06-13)
sin111\ipcore_dir\sin1 (0, 2017-06-13)
sin111\ipcore_dir\sin1.asy (537, 2017-06-13)
sin111\ipcore_dir\sin1.gise (1348, 2017-06-13)
sin111\ipcore_dir\sin1.ncf (0, 2017-06-13)
sin111\ipcore_dir\sin1.ngc (384644, 2017-06-13)
sin111\ipcore_dir\sin1.sym (1566, 2017-06-13)
sin111\ipcore_dir\sin1.vhd (4568, 2017-06-13)
sin111\ipcore_dir\sin1.vho (4403, 2017-06-13)
sin111\ipcore_dir\sin1.xco (1925, 2017-06-13)
sin111\ipcore_dir\sin1.xise (4981, 2017-06-13)
sin111\ipcore_dir\sin1\doc (0, 2017-06-13)
sin111\ipcore_dir\sin1\doc\cordic_ds249.pdf (841531, 2017-06-13)
sin111\ipcore_dir\sin1\doc\cordic_v4_0_vinfo.html (7193, 2017-06-13)
sin111\ipcore_dir\sin1_flist.txt (249, 2017-06-13)
sin111\ipcore_dir\sin1_xmdf.tcl (2972, 2017-06-13)
sin111\ipcore_dir\sin\doc (0, 2017-06-13)
sin111\ipcore_dir\sin\doc\cordic_ds249.pdf (841531, 2017-06-13)
sin111\ipcore_dir\sin\doc\cordic_v4_0_vinfo.html (7193, 2017-06-13)
sin111\ipcore_dir\sin_flist.txt (211, 2017-06-13)
sin111\ipcore_dir\sin_xmdf.tcl (2956, 2017-06-13)
sin111\ipcore_dir\tmp (0, 2017-06-13)
... ...

The following files were generated for 'sin' in directory D:\XNILIX\shiyan\sin111\ipcore_dir\ Generate XCO file: CORE Generator input file containing the parameters used to generate a core. * sin.xco Generate Implementation Netlist: Binary Xilinx implementation netlist files containing the information required to implement the module in a Xilinx (R) FPGA. * sin.ngc Obfuscate Netlist Generator: Please see the core data sheet. * sin.ngc Generate Instantiation Templates: Template files containing code that can be used as a model for instantiating a CORE Generator module in an HDL design. * sin.vho RTL Simulation Model Generator: Please see the core data sheet. * sin.vhd All Documents Generator: Please see the core data sheet. * sin/doc/cordic_ds249.pdf * sin/doc/cordic_v4_0_vinfo.html Deliver IP Symbol: Graphical symbol information file. Used by the ISE tools and some third party tools to create a symbol representing the core. * sin.asy SYM file generator: Generate a SYM file for compatibility with legacy flows * sin.sym Generate XMDF file: ISE Project Navigator interface file. ISE uses this file to determine how the files output by CORE Generator for the core can be integrated into your ISE project. * sin_xmdf.tcl Generate ISE project file: ISE Project Navigator support files. These are generated files and should not be edited directly. * sin.gise * sin.xise Deliver Readme: Readme file for the IP. * sin_readme.txt Generate FLIST file: Text file listing all of the output files produced when a customized core was generated in the CORE Generator. * sin_flist.txt Please see the Xilinx CORE Generator online help for further details on generated files and how to use them.

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