altpll0

所属分类:VHDL/FPGA/Verilog
开发工具:VHDL
文件大小:3KB
下载次数:29
上传日期:2011-04-19 19:58:44
上 传 者tianjingang
说明:  锁相环的使用 可以倍频或者分频 可以最多四个输出
(Your use of Altera Corporation s design tools, logic functions --and other software and tools, and its AMPP partner logic --functions, and any output files from any of the foregoing --(including device programming or simulation files), and any --associated documentation or information are expressly subject --to the terms and conditions of the Altera Program License --Subscription Agreement, Altera MegaCore Function License --Agreement, or other applicable license agreement, including, --without limitation, that your use is for the sole purpose of --programming logic devices manufactured by Altera and sold by --Altera or its authorized distributors. Please refer to the --applicable agreement for further details. )

文件列表:
altpll0.vhd (16515, 2011-04-18)

近期下载者

相关文件


收藏者