fpga
所属分类：VHDL/FPGA/Verilog
开发工具：Verilog
文件大小：4600KB
下载次数：15
上传日期：2017-07-27 20:05:25
上 传 者：
回家吃饭了
说明： verilg语言实现测频 及与stm32以fsmc通信方式进行通信
(Verilg to achieve frequency measurement and communication with STM32 in FSMC communication mode)
文件列表:
fpga\db\.cmp.kpt (208, 2017-07-21)
fpga\db\altsyncram_i124.tdf (78754, 2017-07-19)
fpga\db\altsyncram_m124.tdf (78754, 2017-07-19)
fpga\db\altsyncram_m504.tdf (606509, 2017-07-19)
fpga\db\cmpr_ngc.tdf (1684, 2017-07-19)
fpga\db\cmpr_rgc.tdf (2006, 2017-07-19)
fpga\db\cmpr_tgc.tdf (2165, 2017-07-19)
fpga\db\cntr_23j.tdf (3298, 2017-07-19)
fpga\db\cntr_egi.tdf (3864, 2017-07-19)
fpga\db\cntr_g9j.tdf (4102, 2017-07-19)
fpga\db\cntr_igi.tdf (3864, 2017-07-19)
fpga\db\cntr_o9j.tdf (4365, 2017-07-19)
fpga\db\cntr_pgi.tdf (4126, 2017-07-19)
fpga\db\decode_dvf.tdf (1565, 2017-07-19)
fpga\db\decode_rsa.tdf (3299, 2017-07-19)
fpga\db\icore3_adp.map_bb.logdb (4, 2017-07-21)
fpga\db\icore3_adp_top.(0).cnf.cdb (3008, 2017-07-19)
fpga\db\icore3_adp_top.(0).cnf.hdb (1497, 2017-07-19)
fpga\db\icore3_adp_top.(1).cnf.cdb (1999, 2017-07-17)
fpga\db\icore3_adp_top.(1).cnf.hdb (1293, 2017-07-17)
fpga\db\icore3_adp_top.(10).cnf.cdb (4417, 2017-07-19)
fpga\db\icore3_adp_top.(10).cnf.hdb (2666, 2017-07-19)
fpga\db\icore3_adp_top.(11).cnf.cdb (1823, 2017-07-19)
fpga\db\icore3_adp_top.(11).cnf.hdb (726, 2017-07-19)
fpga\db\icore3_adp_top.(12).cnf.cdb (5203, 2017-07-19)
fpga\db\icore3_adp_top.(12).cnf.hdb (2225, 2017-07-19)
fpga\db\icore3_adp_top.(13).cnf.cdb (16366, 2017-07-19)
fpga\db\icore3_adp_top.(13).cnf.hdb (1358, 2017-07-19)
fpga\db\icore3_adp_top.(14).cnf.cdb (8263, 2017-07-19)
fpga\db\icore3_adp_top.(14).cnf.hdb (5082, 2017-07-19)
fpga\db\icore3_adp_top.(15).cnf.cdb (1593, 2017-07-19)
fpga\db\icore3_adp_top.(15).cnf.hdb (828, 2017-07-19)
fpga\db\icore3_adp_top.(16).cnf.cdb (1818, 2017-07-19)
fpga\db\icore3_adp_top.(16).cnf.hdb (1491, 2017-07-19)
fpga\db\icore3_adp_top.(17).cnf.cdb (2468, 2017-07-19)
fpga\db\icore3_adp_top.(17).cnf.hdb (756, 2017-07-19)
fpga\db\icore3_adp_top.(18).cnf.cdb (11241, 2017-07-19)
fpga\db\icore3_adp_top.(18).cnf.hdb (2927, 2017-07-19)
fpga\db\icore3_adp_top.(19).cnf.cdb (2818, 2017-07-19)
fpga\db\icore3_adp_top.(19).cnf.hdb (769, 2017-07-19)
... ...
This folder contains data for incremental compilation.
The compiled_partitions sub-folder contains previous compilation results for each partition.
As long as this folder is preserved, incremental compilation results from earlier compiles
can be re-used. To perform a clean compilation from source files for all partitions, both
the db and incremental_db folder should be removed.
The imported_partitions sub-folder contains the last imported QXP for each imported partition.
As long as this folder is preserved, imported partitions will be automatically re-imported
when the db or incremental_db/compiled_partitions folders are removed.
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