sp6ex19

所属分类:VHDL/FPGA/Verilog
开发工具:Verilog
文件大小:5060KB
下载次数:12
上传日期:2017-08-02 10:33:08
上 传 者没伞的孩子
说明:  FPGA片内FIFO实例,对FPGA片内FIFO进行读写测试
(FPGA examples of FIFO, FPGA on-chip FIFO reading and writing test)

文件列表:
sp6ex19\counter.lso (6, 2015-05-19)
sp6ex19\counter.prj (38, 2015-05-19)
sp6ex19\counter.stx (1693, 2015-05-19)
sp6ex19\counter.xst (1144, 2015-05-19)
sp6ex19\ipcore_dir\chipscope\chipscope_debug.cdc (4778, 2015-05-29)
sp6ex19\ipcore_dir\coregen.cgp (237, 2015-05-11)
sp6ex19\ipcore_dir\coregen.log (113, 2015-06-20)
sp6ex19\ipcore_dir\create_fifo_controller.tcl (1285, 2015-06-20)
sp6ex19\ipcore_dir\create_pll_controller.tcl (1262, 2015-05-11)
sp6ex19\ipcore_dir\edit_pll_controller.tcl (1129, 2015-05-27)
sp6ex19\ipcore_dir\fifo_controller\coregen.cgp (237, 2015-05-29)
sp6ex19\ipcore_dir\fifo_controller\coregen.log (192, 2015-06-20)
sp6ex19\ipcore_dir\fifo_controller\create_fifo_controller.tcl (1275, 2015-05-29)
sp6ex19\ipcore_dir\fifo_controller\edit_fifo_controller.tcl (1130, 2015-06-20)
sp6ex19\ipcore_dir\fifo_controller\fifo_controller\doc\fifo_generator_v9_3_vinfo.html (10447, 2015-05-29)
sp6ex19\ipcore_dir\fifo_controller\fifo_controller\doc\pg057-fifo-generator.pdf (75348, 2015-05-29)
sp6ex19\ipcore_dir\fifo_controller\fifo_controller\example_design\fifo_controller_exdes.ucf (2674, 2015-05-29)
sp6ex19\ipcore_dir\fifo_controller\fifo_controller\example_design\fifo_controller_exdes.vhd (4962, 2015-05-29)
sp6ex19\ipcore_dir\fifo_controller\fifo_controller\implement\implement.bat (3383, 2015-05-29)
sp6ex19\ipcore_dir\fifo_controller\fifo_controller\implement\implement.sh (3291, 2015-05-29)
sp6ex19\ipcore_dir\fifo_controller\fifo_controller\implement\implement_synplify.bat (3392, 2015-05-29)
sp6ex19\ipcore_dir\fifo_controller\fifo_controller\implement\implement_synplify.sh (3302, 2015-05-29)
sp6ex19\ipcore_dir\fifo_controller\fifo_controller\implement\planAhead_ise.bat (2636, 2015-05-29)
sp6ex19\ipcore_dir\fifo_controller\fifo_controller\implement\planAhead_ise.sh (2587, 2015-05-29)
sp6ex19\ipcore_dir\fifo_controller\fifo_controller\implement\planAhead_ise.tcl (3205, 2015-05-29)
sp6ex19\ipcore_dir\fifo_controller\fifo_controller\implement\xst.prj (50, 2015-05-29)
sp6ex19\ipcore_dir\fifo_controller\fifo_controller\implement\xst.scr (239, 2015-05-29)
sp6ex19\ipcore_dir\fifo_controller\fifo_controller\simulation\fifo_controller_dgen.vhd (4683, 2015-05-29)
sp6ex19\ipcore_dir\fifo_controller\fifo_controller\simulation\fifo_controller_dverif.vhd (6012, 2015-05-29)
sp6ex19\ipcore_dir\fifo_controller\fifo_controller\simulation\fifo_controller_pctrl.vhd (15878, 2015-05-29)
sp6ex19\ipcore_dir\fifo_controller\fifo_controller\simulation\fifo_controller_pkg.vhd (11691, 2015-05-29)
sp6ex19\ipcore_dir\fifo_controller\fifo_controller\simulation\fifo_controller_rng.vhd (4008, 2015-05-29)
sp6ex19\ipcore_dir\fifo_controller\fifo_controller\simulation\fifo_controller_synth.vhd (10118, 2015-05-29)
sp6ex19\ipcore_dir\fifo_controller\fifo_controller\simulation\fifo_controller_tb.vhd (5971, 2015-05-29)
sp6ex19\ipcore_dir\fifo_controller\fifo_controller\simulation\functional\simulate_isim.bat (3040, 2015-05-29)
sp6ex19\ipcore_dir\fifo_controller\fifo_controller\simulation\functional\simulate_isim.sh (3071, 2015-05-29)
sp6ex19\ipcore_dir\fifo_controller\fifo_controller\simulation\functional\simulate_mti.bat (2294, 2015-05-29)
sp6ex19\ipcore_dir\fifo_controller\fifo_controller\simulation\functional\simulate_mti.do (3138, 2015-05-29)
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The following files were generated for 'icon_pro' in directory E:\ds\xilinx_sp6\prj\sp6_onchip_rom\_ngo\cs_icon_pro\ XCO file generator: Generate an XCO file for compatibility with legacy flows. * icon_pro.xco Creates an implementation netlist: Creates an implementation netlist for the IP. * icon_pro.ngc * icon_pro.ucf * icon_pro.vhd * icon_pro.vho Creates an HDL instantiation template: Creates an HDL instantiation template for the IP. * icon_pro.vho Generate ISE metadata: Create a metadata file for use when including this core in ISE designs * icon_pro_xmdf.tcl Generate ISE subproject: Create an ISE subproject for use when including this core in ISE designs * icon_pro.gise * icon_pro.xise Deliver Readme: Readme file for the IP. * icon_pro_readme.txt Generate FLIST file: Text file listing all of the output files produced when a customized core was generated in the CORE Generator. * icon_pro_flist.txt Please see the Xilinx CORE Generator online help for further details on generated files and how to use them.

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