A4_Clock_Top
所属分类：VHDL/FPGA/Verilog
开发工具：Verilog
文件大小：3711KB
下载次数：3
上传日期：2017-08-11 16:51:43
上 传 者：
Hardware-engineer
说明： 24小时制数字时钟，可自行调节时间，能暂停。
(24 hours digital clock, can adjust time, can pause.)
文件列表:
A4_Clock_Top (0, 2017-08-11)
A4_Clock_Top\A4_Clock_Top.qpf (1283, 2017-01-03)
A4_Clock_Top\A4_Clock_Top.qsf (5557, 2017-08-02)
A4_Clock_Top\A4_Clock_Top.qws (766, 2017-08-11)
A4_Clock_Top\A4_Clock_Top.v (3504, 2017-03-28)
A4_Clock_Top\A4_Clock_Top.v.bak (3469, 2016-04-25)
A4_Clock_Top\Beep_Module.v (3262, 2017-08-01)
A4_Clock_Top\Beep_Module.v.bak (3262, 2015-08-31)
A4_Clock_Top\Counter_Module.v (9980, 2017-08-02)
A4_Clock_Top\Counter_Module.v.bak (10017, 2016-04-25)
A4_Clock_Top\Key_Module.v (2884, 2015-08-31)
A4_Clock_Top\Segled_Module.v (5996, 2015-08-31)
A4_Clock_Top\db (0, 2017-08-11)
A4_Clock_Top\db\.cmp.kpt (208, 2017-03-28)
A4_Clock_Top\db\A4_Clock_Top.(0).cnf.cdb (2636, 2017-07-31)
A4_Clock_Top\db\A4_Clock_Top.(0).cnf.hdb (1436, 2017-07-31)
A4_Clock_Top\db\A4_Clock_Top.(1).cnf.cdb (7694, 2017-08-02)
A4_Clock_Top\db\A4_Clock_Top.(1).cnf.hdb (2125, 2017-08-02)
A4_Clock_Top\db\A4_Clock_Top.(2).cnf.cdb (4504, 2017-07-31)
A4_Clock_Top\db\A4_Clock_Top.(2).cnf.hdb (1739, 2017-07-31)
A4_Clock_Top\db\A4_Clock_Top.(3).cnf.cdb (3746, 2017-08-02)
A4_Clock_Top\db\A4_Clock_Top.(3).cnf.hdb (1549, 2017-08-02)
A4_Clock_Top\db\A4_Clock_Top.(4).cnf.cdb (3484, 2017-07-31)
A4_Clock_Top\db\A4_Clock_Top.(4).cnf.hdb (1223, 2017-07-31)
A4_Clock_Top\db\A4_Clock_Top.asm.qmsg (2535, 2017-08-02)
A4_Clock_Top\db\A4_Clock_Top.asm.rdb (1413, 2017-08-02)
A4_Clock_Top\db\A4_Clock_Top.asm_labs.ddb (11216, 2017-08-02)
A4_Clock_Top\db\A4_Clock_Top.cbx.xml (94, 2017-08-02)
A4_Clock_Top\db\A4_Clock_Top.cmp.bpm (871, 2017-08-02)
A4_Clock_Top\db\A4_Clock_Top.cmp.cdb (55642, 2017-08-02)
A4_Clock_Top\db\A4_Clock_Top.cmp.hdb (18427, 2017-08-02)
A4_Clock_Top\db\A4_Clock_Top.cmp.idb (27610, 2017-08-02)
A4_Clock_Top\db\A4_Clock_Top.cmp.kpt (223, 2017-08-02)
A4_Clock_Top\db\A4_Clock_Top.cmp.logdb (18349, 2017-08-02)
A4_Clock_Top\db\A4_Clock_Top.cmp.rdb (23673, 2017-08-02)
A4_Clock_Top\db\A4_Clock_Top.cmp_merge.kpt (228, 2017-08-02)
A4_Clock_Top\db\A4_Clock_Top.cycloneive_io_sim_cache.45um_ff_1200mv_0c_fast.hsd (744909, 2017-08-02)
A4_Clock_Top\db\A4_Clock_Top.cycloneive_io_sim_cache.45um_ss_1200mv_0c_slow.hsd (744747, 2017-08-02)
A4_Clock_Top\db\A4_Clock_Top.cycloneive_io_sim_cache.45um_ss_1200mv_85c_slow.hsd (739638, 2017-08-02)
A4_Clock_Top\db\A4_Clock_Top.db_info (155, 2017-08-11)
... ...
This folder contains data for incremental compilation.
The compiled_partitions sub-folder contains previous compilation results for each partition.
As long as this folder is preserved, incremental compilation results from earlier compiles
can be re-used. To perform a clean compilation from source files for all partitions, both
the db and incremental_db folder should be removed.
The imported_partitions sub-folder contains the last imported QXP for each imported partition.
As long as this folder is preserved, imported partitions will be automatically re-imported
when the db or incremental_db/compiled_partitions folders are removed.
近期下载者：
相关文件：
收藏者：