SV_AVMM_DMA_DDR3_128M
所属分类：VHDL/FPGA/Verilog
开发工具：Verilog
文件大小：31308KB
下载次数：30
上传日期：2017-08-20 11:17:45
上 传 者：
ldx001001
说明： altera公司avmm借口pcie dma设计实例，在实际工程中应用成功
(Altera avmm, Inc., PCIe DMA design example, applied successfully in actual engineering)
文件列表:
SV_AVMM_DMA_DDR3_128M (0, 2014-11-20)
SV_AVMM_DMA_DDR3_128M\altpcie_sv_hip_ast_hip_status_bridge.v (9476, 2014-02-01)
SV_AVMM_DMA_DDR3_128M\avgz_pinout.tcl (11421, 2014-02-01)
SV_AVMM_DMA_DDR3_128M\hip_status_hw.tcl (10467, 2014-02-01)
SV_AVMM_DMA_DDR3_128M\pcie_lib (0, 2014-11-19)
SV_AVMM_DMA_DDR3_128M\pcie_lib\top (0, 2014-11-19)
SV_AVMM_DMA_DDR3_128M\pcie_lib\top\synthesis (0, 2014-11-19)
SV_AVMM_DMA_DDR3_128M\pcie_lib\top\synthesis\submodules (0, 2014-11-19)
SV_AVMM_DMA_DDR3_128M\pcie_lib\top\synthesis\submodules\afi_mux_ddr3_ddrx.v (8866, 2014-11-19)
SV_AVMM_DMA_DDR3_128M\pcie_lib\top\synthesis\submodules\alt_arbiter_acq.sv (3094, 2014-11-19)
SV_AVMM_DMA_DDR3_128M\pcie_lib\top\synthesis\submodules\alt_mem_ddrx_addr_cmd.v (25417, 2014-11-19)
SV_AVMM_DMA_DDR3_128M\pcie_lib\top\synthesis\submodules\alt_mem_ddrx_addr_cmd_wrap.v (55990, 2014-11-19)
SV_AVMM_DMA_DDR3_128M\pcie_lib\top\synthesis\submodules\alt_mem_ddrx_arbiter.v (53317, 2014-11-19)
SV_AVMM_DMA_DDR3_128M\pcie_lib\top\synthesis\submodules\alt_mem_ddrx_axi_st_converter.v (57284, 2014-11-19)
SV_AVMM_DMA_DDR3_128M\pcie_lib\top\synthesis\submodules\alt_mem_ddrx_buffer.v (4823, 2014-11-19)
SV_AVMM_DMA_DDR3_128M\pcie_lib\top\synthesis\submodules\alt_mem_ddrx_buffer_manager.v (8756, 2014-11-19)
SV_AVMM_DMA_DDR3_128M\pcie_lib\top\synthesis\submodules\alt_mem_ddrx_burst_gen.v (69081, 2014-11-19)
SV_AVMM_DMA_DDR3_128M\pcie_lib\top\synthesis\submodules\alt_mem_ddrx_burst_tracking.v (4593, 2014-11-19)
SV_AVMM_DMA_DDR3_128M\pcie_lib\top\synthesis\submodules\alt_mem_ddrx_cmd_gen.v (121760, 2014-11-19)
SV_AVMM_DMA_DDR3_128M\pcie_lib\top\synthesis\submodules\alt_mem_ddrx_controller.v (177414, 2014-11-19)
SV_AVMM_DMA_DDR3_128M\pcie_lib\top\synthesis\submodules\alt_mem_ddrx_controller_st_top.v (96841, 2014-11-19)
SV_AVMM_DMA_DDR3_128M\pcie_lib\top\synthesis\submodules\alt_mem_ddrx_csr.v (52451, 2014-11-19)
SV_AVMM_DMA_DDR3_128M\pcie_lib\top\synthesis\submodules\alt_mem_ddrx_dataid_manager.v (41379, 2014-11-19)
SV_AVMM_DMA_DDR3_128M\pcie_lib\top\synthesis\submodules\alt_mem_ddrx_ddr2_odt_gen.v (18798, 2014-11-19)
SV_AVMM_DMA_DDR3_128M\pcie_lib\top\synthesis\submodules\alt_mem_ddrx_ddr3_odt_gen.v (18618, 2014-11-19)
SV_AVMM_DMA_DDR3_128M\pcie_lib\top\synthesis\submodules\alt_mem_ddrx_define.iv (2196, 2014-11-19)
SV_AVMM_DMA_DDR3_128M\pcie_lib\top\synthesis\submodules\alt_mem_ddrx_ecc_decoder.v (15975, 2014-11-19)
SV_AVMM_DMA_DDR3_128M\pcie_lib\top\synthesis\submodules\alt_mem_ddrx_ecc_decoder_32_syn.v (33376, 2014-11-19)
SV_AVMM_DMA_DDR3_128M\pcie_lib\top\synthesis\submodules\alt_mem_ddrx_ecc_decoder_64_syn.v (59367, 2014-11-19)
SV_AVMM_DMA_DDR3_128M\pcie_lib\top\synthesis\submodules\alt_mem_ddrx_ecc_encoder.v (10689, 2014-11-19)
SV_AVMM_DMA_DDR3_128M\pcie_lib\top\synthesis\submodules\alt_mem_ddrx_ecc_encoder_32_syn.v (13776, 2014-11-19)
SV_AVMM_DMA_DDR3_128M\pcie_lib\top\synthesis\submodules\alt_mem_ddrx_ecc_encoder_64_syn.v (21837, 2014-11-19)
SV_AVMM_DMA_DDR3_128M\pcie_lib\top\synthesis\submodules\alt_mem_ddrx_ecc_encoder_decoder_wrapper.v (49596, 2014-11-19)
SV_AVMM_DMA_DDR3_128M\pcie_lib\top\synthesis\submodules\alt_mem_ddrx_fifo.v (8161, 2014-11-19)
SV_AVMM_DMA_DDR3_128M\pcie_lib\top\synthesis\submodules\alt_mem_ddrx_input_if.v (10789, 2014-11-19)
SV_AVMM_DMA_DDR3_128M\pcie_lib\top\synthesis\submodules\alt_mem_ddrx_list.v (8397, 2014-11-19)
SV_AVMM_DMA_DDR3_128M\pcie_lib\top\synthesis\submodules\alt_mem_ddrx_lpddr2_addr_cmd.v (17686, 2014-11-19)
SV_AVMM_DMA_DDR3_128M\pcie_lib\top\synthesis\submodules\alt_mem_ddrx_mm_st_converter.v (11739, 2014-11-19)
SV_AVMM_DMA_DDR3_128M\pcie_lib\top\synthesis\submodules\alt_mem_ddrx_odt_gen.v (15027, 2014-11-19)
SV_AVMM_DMA_DDR3_128M\pcie_lib\top\synthesis\submodules\alt_mem_ddrx_rank_timer.v (120334, 2014-11-19)
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