E4_6_FirIpCore

所属分类:VHDL/FPGA/Verilog
开发工具:VHDL
文件大小:1167KB
下载次数:1
上传日期:2017-09-13 11:16:47
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说明:  对软件自带的fir 核进行相关配置,仿真测试其功能,同时完成相关滤波作用,观察其输出波形
(The configuration of the fir kernel is simulated, the function is tested, the function of correlation filtering is observed, and the output waveform is observed.)

文件列表:
E4_6_FirIpCore\E4_6_FpgaData.txt (35946, 2013-03-25)
E4_6_FirIpCore\E4_6_lpf.coe (215, 2013-03-18)
E4_6_FirIpCore\E4_6_LpfDesign.m (1531, 2013-03-13)
E4_6_FirIpCore\E4_6_TestData.M (1986, 2013-03-18)
E4_6_FirIpCore\E4_6_TestData.txt (28001, 2013-03-18)
E4_6_FirIpCore\FirIPCore\fir.mif (976, 2011-04-16)
E4_6_FirIpCore\FirIPCore\fir1.mif (976, 2011-04-16)
E4_6_FirIpCore\FirIPCore\fir1COEFF_auto0_0.mif (272, 2011-04-16)
E4_6_FirIpCore\FirIPCore\fir1COEFF_auto0_1.mif (272, 2011-04-16)
E4_6_FirIpCore\FirIPCore\fir1filt_decode_rom.mif (102, 2011-04-16)
E4_6_FirIpCore\FirIPCore\FirIPCore.bld (6045, 2011-04-16)
E4_6_FirIpCore\FirIPCore\FirIPCore.cmd_log (2707, 2011-04-16)
E4_6_FirIpCore\FirIPCore\FirIPCore.gise (14256, 2013-03-25)
E4_6_FirIpCore\FirIPCore\FirIPCore.ise (52714, 2013-03-25)
E4_6_FirIpCore\FirIPCore\FirIPCore.lso (6, 2011-04-14)
E4_6_FirIpCore\FirIPCore\FirIPCore.ncd (271494, 2011-04-16)
E4_6_FirIpCore\FirIPCore\FirIPCore.ngc (9680, 2011-04-16)
E4_6_FirIpCore\FirIPCore\FirIPCore.ngd (626728, 2011-04-16)
E4_6_FirIpCore\FirIPCore\FirIPCore.ngr (5198, 2011-04-16)
E4_6_FirIpCore\FirIPCore\FirIPCore.pad (11480, 2011-04-16)
E4_6_FirIpCore\FirIPCore\FirIPCore.par (5897, 2011-04-16)
E4_6_FirIpCore\FirIPCore\FirIPCore.pcf (215, 2011-04-16)
E4_6_FirIpCore\FirIPCore\FirIPCore.prj (60, 2011-04-16)
E4_6_FirIpCore\FirIPCore\FirIPCore.ptwx (17001, 2011-04-16)
E4_6_FirIpCore\FirIPCore\FirIPCore.syr (16794, 2011-04-16)
E4_6_FirIpCore\FirIPCore\FirIPCore.twr (5416, 2011-04-16)
E4_6_FirIpCore\FirIPCore\FirIPCore.twx (29126, 2011-04-16)
E4_6_FirIpCore\FirIPCore\FirIPCore.ucf (78, 2013-03-13)
E4_6_FirIpCore\FirIPCore\FirIPCore.unroutes (153, 2011-04-16)
E4_6_FirIpCore\FirIPCore\FirIPCore.vhd (1603, 2013-03-13)
E4_6_FirIpCore\FirIPCore\FirIPCore.xise (37957, 2013-03-25)
E4_6_FirIpCore\FirIPCore\FirIPCore.xpi (46, 2011-04-16)
E4_6_FirIpCore\FirIPCore\FirIPCore.xst (1113, 2011-04-16)
E4_6_FirIpCore\FirIPCore\FirIPCore_guide.ncd (271494, 2011-04-16)
E4_6_FirIpCore\FirIPCore\FirIPCore_map.map (8092, 2011-04-16)
E4_6_FirIpCore\FirIPCore\FirIPCore_map.mrp (18536, 2011-04-16)
E4_6_FirIpCore\FirIPCore\FirIPCore_map.ncd (163898, 2011-04-16)
E4_6_FirIpCore\FirIPCore\FirIPCore_map.ngm (1367861, 2011-04-16)
E4_6_FirIpCore\FirIPCore\FirIPCore_map.xrpt (40239, 2011-04-16)
E4_6_FirIpCore\FirIPCore\FirIPCore_ngdbuild.xrpt (4187, 2011-04-16)
... ...

The following files were generated for 'lpf' in directory D:\ModemPrograms\Chpter_4\E4_6_FirIpCore\FirIPCore\ipcore_dir\ lpf_flist.txt: Text file listing all of the output files produced when a customized core was generated in the CORE Generator. lpf.asy: Graphical symbol information file. Used by the ISE tools and some third party tools to create a symbol representing the core. lpf.gise: ISE Project Navigator support file. This is a generated file and should not be edited directly. lpf.ise: ISE Project Navigator support file. This is a generated file and should not be edited directly. lpf.mif: Memory Initialization File which is automatically generated by the CORE Generator System for some modules when a simulation flow is specified. A MIF data file is used to support HDL functional simulation of modules which use arrays of values. lpf.ngc: Binary Xilinx implementation netlist file containing the information required to implement the module in a Xilinx (R) FPGA. lpf.sym: Please see the core data sheet. lpf.v: Verilog wrapper file provided to support functional simulation. This file contains simulation model customization data that is passed to a parameterized simulation model for the core. lpf.veo: VEO template file containing code that can be used as a model for instantiating a CORE Generator module in a Verilog design. lpf.vhd: VHDL wrapper file provided to support functional simulation. This file contains simulation model customization data that is passed to a parameterized simulation model for the core. lpf.vho: VHO template file containing code that can be used as a model for instantiating a CORE Generator module in a VHDL design. lpf.xco: CORE Generator input file containing the parameters used to regenerate a core. lpf.xise: ISE Project Navigator support file. This is a generated file and should not be edited directly. lpfCOEFF_auto0_0.mif: Memory Initialization File which is automatically generated by the CORE Generator System for some modules when a simulation flow is specified. A MIF data file is used to support HDL functional simulation of modules which use arrays of values. lpfCOEFF_auto0_1.mif: Memory Initialization File which is automatically generated by the CORE Generator System for some modules when a simulation flow is specified. A MIF data file is used to support HDL functional simulation of modules which use arrays of values. lpfCOEFF_auto0_2.mif: Memory Initialization File which is automatically generated by the CORE Generator System for some modules when a simulation flow is specified. A MIF data file is used to support HDL functional simulation of modules which use arrays of values. lpf_readme.txt: Text file indicating the files generated and how they are used. lpf_xmdf.tcl: ISE Project Navigator interface file. ISE uses this file to determine how the files output by CORE Generator for the core can be integrated into your ISE project. lpffilt_decode_rom.mif: Memory Initialization File which is automatically generated by the CORE Generator System for some modules when a simulation flow is specified. A MIF data file is used to support HDL functional simulation of modules which use arrays of values. Please see the Xilinx CORE Generator online help for further details on generated files and how to use them.

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