hdl-2014_r2
ad9361 

所属分类:VHDL/FPGA/Verilog
开发工具:Vivado
文件大小:1310KB
下载次数:4
上传日期:2017-09-18 18:00:20
上 传 者小陈3
说明:  AD9361 IP核,Windows版本,Vivado2014.2
(AD9361 IP core, used on Windows, Vivado2014.2)

文件列表:
hdl-2014_r2 (0, 2015-06-16)
hdl-2014_r2\LICENSE (1914, 2015-06-16)
hdl-2014_r2\library (0, 2015-06-16)
hdl-2014_r2\library\axi_ad6676 (0, 2015-06-16)
hdl-2014_r2\library\axi_ad6676\axi_ad6676.v (10140, 2015-06-16)
hdl-2014_r2\library\axi_ad6676\axi_ad6676_channel.v (5565, 2015-06-16)
hdl-2014_r2\library\axi_ad6676\axi_ad6676_constr.xdc (4, 2015-06-16)
hdl-2014_r2\library\axi_ad6676\axi_ad6676_if.v (4279, 2015-06-16)
hdl-2014_r2\library\axi_ad6676\axi_ad6676_ip.tcl (895, 2015-06-16)
hdl-2014_r2\library\axi_ad6676\axi_ad6676_pnmon.v (7199, 2015-06-16)
hdl-2014_r2\library\axi_ad7175 (0, 2015-06-16)
hdl-2014_r2\library\axi_ad7175\ad7175_if.v (16658, 2015-06-16)
hdl-2014_r2\library\axi_ad7175\ad_datafmt.v (4124, 2015-06-16)
hdl-2014_r2\library\axi_ad7175\axi_ad7175.v (12254, 2015-06-16)
hdl-2014_r2\library\axi_ad7175\axi_ad7175_channel.v (5488, 2015-06-16)
hdl-2014_r2\library\axi_ad7175\axi_ad7175_ip.tcl (708, 2015-06-16)
hdl-2014_r2\library\axi_ad7175\clk_div.v (4487, 2015-06-16)
hdl-2014_r2\library\axi_ad7175\up_adc_common.v (16182, 2015-06-16)
hdl-2014_r2\library\axi_ad9122 (0, 2015-06-16)
hdl-2014_r2\library\axi_ad9122\axi_ad9122.v (10507, 2015-06-16)
hdl-2014_r2\library\axi_ad9122\axi_ad9122_channel.v (9867, 2015-06-16)
hdl-2014_r2\library\axi_ad9122\axi_ad9122_constr.xdc (176, 2015-06-16)
hdl-2014_r2\library\axi_ad9122\axi_ad9122_core.v (9061, 2015-06-16)
hdl-2014_r2\library\axi_ad9122\axi_ad9122_if.v (7803, 2015-06-16)
hdl-2014_r2\library\axi_ad9122\axi_ad9122_ip.tcl (1125, 2015-06-16)
hdl-2014_r2\library\axi_ad9144 (0, 2015-06-16)
hdl-2014_r2\library\axi_ad9144\axi_ad9144.v (10849, 2015-06-16)
hdl-2014_r2\library\axi_ad9144\axi_ad9144_channel.v (22236, 2015-06-16)
hdl-2014_r2\library\axi_ad9144\axi_ad9144_constr.xdc (172, 2015-06-16)
hdl-2014_r2\library\axi_ad9144\axi_ad9144_core.v (9799, 2015-06-16)
hdl-2014_r2\library\axi_ad9144\axi_ad9144_if.v (5773, 2015-06-16)
hdl-2014_r2\library\axi_ad9144\axi_ad9144_ip.tcl (977, 2015-06-16)
hdl-2014_r2\library\axi_ad9152 (0, 2015-06-16)
hdl-2014_r2\library\axi_ad9152\axi_ad9152.v (7744, 2015-06-16)
hdl-2014_r2\library\axi_ad9152\axi_ad9152_channel.v (22236, 2015-06-16)
hdl-2014_r2\library\axi_ad9152\axi_ad9152_constr.xdc (172, 2015-06-16)
hdl-2014_r2\library\axi_ad9152\axi_ad9152_core.v (7575, 2015-06-16)
hdl-2014_r2\library\axi_ad9152\axi_ad9152_if.v (4605, 2015-06-16)
... ...

hdl === Analog Devices HDL libraries and projects Tools version: - Vivado 2014.2 - Quartus 14.0 First time users, it is highly recommended to go through our HDL user guide at the following url: http://wiki.analog.com/resources/fpga/docs/hdl For support please visit our FPGA Reference Designs Support Community on EngineerZone: http://ez.analog.com/community/fpga

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