SDRAM_240T
所属分类：VHDL/FPGA/Verilog
开发工具：VHDL
文件大小：2682KB
下载次数：1
上传日期：2017-09-22 14:45:04
上 传 者：
fengz
说明： 本文档介绍了怎样用硬件编程语言VHDL语音编写SRAM的方法
(This document describes how to write SRAM in a hardware programming language called VHDL)
文件列表:
SDRAM_240T (0, 2017-09-22)
SDRAM_240T\db (0, 2017-09-22)
SDRAM_240T\db\logic_util_heursitic.dat (5632, 2017-09-22)
SDRAM_240T\db\prev_cmp_sram.qmsg (56885, 2017-09-22)
SDRAM_240T\db\sram.(0).cnf.cdb (1609, 2017-09-22)
SDRAM_240T\db\sram.(0).cnf.hdb (1354, 2017-09-22)
SDRAM_240T\db\sram.amm.cdb (274, 2017-09-22)
SDRAM_240T\db\sram.asm.qmsg (2184, 2017-09-22)
SDRAM_240T\db\sram.asm.rdb (1275, 2017-09-22)
SDRAM_240T\db\sram.asm_labs.ddb (2129, 2017-09-22)
SDRAM_240T\db\sram.cbx.xml (86, 2017-09-22)
SDRAM_240T\db\sram.cmp.cdb (21080, 2017-09-22)
SDRAM_240T\db\sram.cmp.hdb (10612, 2017-09-22)
SDRAM_240T\db\sram.cmp.kpt (196, 2017-09-22)
SDRAM_240T\db\sram.cmp.logdb (4, 2017-09-22)
SDRAM_240T\db\sram.cmp.rdb (10680, 2017-09-22)
SDRAM_240T\db\sram.cmp0.ddb (48903, 2017-09-22)
SDRAM_240T\db\sram.cmp_merge.kpt (200, 2017-09-20)
SDRAM_240T\db\sram.cycloneive_io_sim_cache.45um_ff_1200mv_0c_fast.hsd (746340, 2017-09-20)
SDRAM_240T\db\sram.cycloneive_io_sim_cache.45um_ss_1200mv_0c_slow.hsd (745247, 2017-09-20)
SDRAM_240T\db\sram.cycloneive_io_sim_cache.45um_ss_1200mv_85c_slow.hsd (740235, 2017-09-20)
SDRAM_240T\db\sram.db_info (138, 2017-09-20)
SDRAM_240T\db\sram.fit.qmsg (32326, 2017-09-22)
SDRAM_240T\db\sram.hier_info (409, 2017-09-22)
SDRAM_240T\db\sram.hif (725, 2017-09-22)
SDRAM_240T\db\sram.idb.cdb (2356, 2017-09-22)
SDRAM_240T\db\sram.lpc.html (430, 2017-09-22)
SDRAM_240T\db\sram.lpc.rdb (388, 2017-09-22)
SDRAM_240T\db\sram.lpc.txt (1060, 2017-09-22)
SDRAM_240T\db\sram.map.cdb (5543, 2017-09-22)
SDRAM_240T\db\sram.map.hdb (10334, 2017-09-22)
SDRAM_240T\db\sram.map.kpt (199, 2017-09-20)
SDRAM_240T\db\sram.map.logdb (4, 2017-09-22)
SDRAM_240T\db\sram.map.qmsg (6295, 2017-09-22)
SDRAM_240T\db\sram.pre_map.cdb (2068, 2017-09-22)
SDRAM_240T\db\sram.pre_map.hdb (10024, 2017-09-22)
SDRAM_240T\db\sram.rtlv.hdb (10020, 2017-09-22)
SDRAM_240T\db\sram.rtlv_sg.cdb (1658, 2017-09-22)
SDRAM_240T\db\sram.rtlv_sg_swap.cdb (177, 2017-09-22)
SDRAM_240T\db\sram.sgdiff.cdb (5279, 2017-09-22)
... ...
This folder contains data for incremental compilation.
The compiled_partitions sub-folder contains previous compilation results for each partition.
As long as this folder is preserved, incremental compilation results from earlier compiles
can be re-used. To perform a clean compilation from source files for all partitions, both
the db and incremental_db folder should be removed.
The imported_partitions sub-folder contains the last imported QXP for each imported partition.
As long as this folder is preserved, imported partitions will be automatically re-imported
when the db or incremental_db/compiled_partitions folders are removed.
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