Altera-verilog-LCD1602
所属分类：VHDL/FPGA/Verilog
开发工具：Verilog
文件大小：929KB
下载次数：7
上传日期：2017-10-08 11:24:54
上 传 者：
武哥
说明： 用verilog语言编写的驱动lcd1602的代码，用altera fpga开发板验证过；
(use verilog code , driving lcd1602 device, test ok.)
文件列表:
Altera-verilog-LCD1602\db\LCD1602.(0).cnf.cdb (18938, 2013-05-01)
Altera-verilog-LCD1602\db\LCD1602.(0).cnf.hdb (7226, 2013-05-01)
Altera-verilog-LCD1602\db\LCD1602.(1).cnf.cdb (1692, 2013-04-07)
Altera-verilog-LCD1602\db\LCD1602.(1).cnf.hdb (756, 2013-04-07)
Altera-verilog-LCD1602\db\LCD1602.amm.cdb (292, 2014-12-06)
Altera-verilog-LCD1602\db\LCD1602.asm.qmsg (2159, 2014-12-06)
Altera-verilog-LCD1602\db\LCD1602.asm.rdb (1419, 2014-12-06)
Altera-verilog-LCD1602\db\LCD1602.cbx.xml (89, 2014-12-06)
Altera-verilog-LCD1602\db\LCD1602.cmp.bpm (661, 2014-12-06)
Altera-verilog-LCD1602\db\LCD1602.cmp.cdb (30814, 2014-12-06)
Altera-verilog-LCD1602\db\LCD1602.cmp.hdb (12706, 2014-12-06)
Altera-verilog-LCD1602\db\LCD1602.cmp.kpt (205, 2014-12-06)
Altera-verilog-LCD1602\db\LCD1602.cmp.logdb (4, 2014-12-06)
Altera-verilog-LCD1602\db\LCD1602.cmp.rdb (14058, 2014-12-06)
Altera-verilog-LCD1602\db\LCD1602.cmp0.ddb (41091, 2014-12-06)
Altera-verilog-LCD1602\db\LCD1602.cmp_merge.kpt (211, 2014-12-06)
Altera-verilog-LCD1602\db\LCD1602.db_info (138, 2013-04-07)
Altera-verilog-LCD1602\db\LCD1602.fit.qmsg (18097, 2014-12-06)
Altera-verilog-LCD1602\db\LCD1602.hier_info (1861, 2014-12-06)
Altera-verilog-LCD1602\db\LCD1602.hif (639, 2014-12-06)
Altera-verilog-LCD1602\db\LCD1602.idb.cdb (4066, 2014-12-06)
Altera-verilog-LCD1602\db\LCD1602.lpc.html (577, 2014-12-06)
Altera-verilog-LCD1602\db\LCD1602.lpc.rdb (430, 2014-12-06)
Altera-verilog-LCD1602\db\LCD1602.lpc.txt (1491, 2014-12-06)
Altera-verilog-LCD1602\db\LCD1602.map.bpm (618, 2014-12-06)
Altera-verilog-LCD1602\db\LCD1602.map.cdb (9777, 2014-12-06)
Altera-verilog-LCD1602\db\LCD1602.map.hdb (12006, 2014-12-06)
Altera-verilog-LCD1602\db\LCD1602.map.kpt (1869, 2014-12-06)
Altera-verilog-LCD1602\db\LCD1602.map.logdb (4, 2014-12-06)
Altera-verilog-LCD1602\db\LCD1602.map.qmsg (78689, 2014-12-06)
Altera-verilog-LCD1602\db\LCD1602.map.rdb (1214, 2014-12-06)
Altera-verilog-LCD1602\db\LCD1602.map_bb.cdb (1100, 2014-12-06)
Altera-verilog-LCD1602\db\LCD1602.map_bb.hdb (8602, 2014-12-06)
Altera-verilog-LCD1602\db\LCD1602.map_bb.logdb (4, 2014-12-06)
Altera-verilog-LCD1602\db\LCD1602.pre_map.cdb (22489, 2014-12-06)
Altera-verilog-LCD1602\db\LCD1602.pre_map.hdb (10985, 2014-12-06)
Altera-verilog-LCD1602\db\LCD1602.root_partition.map.reg_db.cdb (311, 2014-12-06)
Altera-verilog-LCD1602\db\LCD1602.routing.rdb (2055, 2014-12-06)
Altera-verilog-LCD1602\db\LCD1602.rtlv.hdb (10944, 2014-12-06)
Altera-verilog-LCD1602\db\LCD1602.rtlv_sg.cdb (22303, 2014-12-06)
... ...
This folder contains data for incremental compilation.
The compiled_partitions sub-folder contains previous compilation results for each partition.
As long as this folder is preserved, incremental compilation results from earlier compiles
can be re-used. To perform a clean compilation from source files for all partitions, both
the db and incremental_db folder should be removed.
The imported_partitions sub-folder contains the last imported QXP for each imported partition.
As long as this folder is preserved, imported partitions will be automatically re-imported
when the db or incremental_db/compiled_partitions folders are removed.
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