LCD1602_UART
所属分类：VHDL/FPGA/Verilog
开发工具：Verilog
文件大小：34660KB
下载次数：17
上传日期：2017-10-14 10:27:24
上 传 者：
WinThor
说明： kc705上的1602显示模块的verilog源码，以及UART源码，附带一些设计过程资料
(kc705 1602 display module source code,and UART source code.addition to some design progress document.)
文件列表:
LCD1602_UART\HD44780U.pdf (321295, 2016-07-23)
LCD1602_UART\LCD1602_UART说明文档.docx (337140, 2016-07-23)
LCD1602_UART\UART_BASESYSTEM\ip_upgrade.log (617, 2016-11-28)
LCD1602_UART\UART_BASESYSTEM\UART_BASESYSTEM.cache\ip\1166c939c64830be\1166c939c64830be.xci (397719, 2016-07-22)
LCD1602_UART\UART_BASESYSTEM\UART_BASESYSTEM.cache\ip\1166c939c64830be\u_ila_0_CV.dcp (911124, 2016-07-22)
LCD1602_UART\UART_BASESYSTEM\UART_BASESYSTEM.cache\ip\17c6fae885046e8c\17c6fae885046e8c.xci (397719, 2016-07-22)
LCD1602_UART\UART_BASESYSTEM\UART_BASESYSTEM.cache\ip\17c6fae885046e8c\u_ila_0_CV.dcp (910092, 2016-07-22)
LCD1602_UART\UART_BASESYSTEM\UART_BASESYSTEM.cache\ip\1caa4a7dd19681c9\1caa4a7dd19681c9.xci (397719, 2016-07-22)
LCD1602_UART\UART_BASESYSTEM\UART_BASESYSTEM.cache\ip\1caa4a7dd19681c9\u_ila_2_CV.dcp (861193, 2016-07-22)
LCD1602_UART\UART_BASESYSTEM\UART_BASESYSTEM.cache\ip\46305af8eefb36fe\46305af8eefb36fe.xci (397718, 2016-07-19)
LCD1602_UART\UART_BASESYSTEM\UART_BASESYSTEM.cache\ip\46305af8eefb36fe\u_ila_0_CV.dcp (478315, 2016-07-19)
LCD1602_UART\UART_BASESYSTEM\UART_BASESYSTEM.cache\ip\4b650d87e199bf2c\4b650d87e199bf2c.xci (6214, 2016-07-19)
LCD1602_UART\UART_BASESYSTEM\UART_BASESYSTEM.cache\ip\4b650d87e199bf2c\dbg_hub_CV.dcp (239905, 2016-07-19)
LCD1602_UART\UART_BASESYSTEM\UART_BASESYSTEM.cache\ip\4fec814611b4a2fa\4fec814611b4a2fa.xci (397718, 2016-07-19)
LCD1602_UART\UART_BASESYSTEM\UART_BASESYSTEM.cache\ip\4fec814611b4a2fa\u_ila_0_CV.dcp (469597, 2016-07-19)
LCD1602_UART\UART_BASESYSTEM\UART_BASESYSTEM.cache\ip\5fe062d360533978\5fe062d360533978.xci (397719, 2016-07-19)
LCD1602_UART\UART_BASESYSTEM\UART_BASESYSTEM.cache\ip\5fe062d360533978\u_ila_0_CV.dcp (638320, 2016-07-19)
LCD1602_UART\UART_BASESYSTEM\UART_BASESYSTEM.cache\ip\7840479f91da5a04\7840479f91da5a04.xci (397718, 2016-07-19)
LCD1602_UART\UART_BASESYSTEM\UART_BASESYSTEM.cache\ip\7840479f91da5a04\u_ila_1_CV.dcp (586965, 2016-07-19)
LCD1602_UART\UART_BASESYSTEM\UART_BASESYSTEM.cache\ip\7fd58608d014105f\7fd58608d014105f.xci (397719, 2016-07-22)
LCD1602_UART\UART_BASESYSTEM\UART_BASESYSTEM.cache\ip\7fd58608d014105f\u_ila_0_CV.dcp (893802, 2016-07-22)
LCD1602_UART\UART_BASESYSTEM\UART_BASESYSTEM.cache\ip\998c81fed96e18b8\998c81fed96e18b8.xci (397718, 2016-07-22)
LCD1602_UART\UART_BASESYSTEM\UART_BASESYSTEM.cache\ip\998c81fed96e18b8\u_ila_1_CV.dcp (591425, 2016-07-22)
LCD1602_UART\UART_BASESYSTEM\UART_BASESYSTEM.cache\ip\9b409d22945d55e0\9b409d22945d55e0.xci (397718, 2016-07-22)
LCD1602_UART\UART_BASESYSTEM\UART_BASESYSTEM.cache\ip\9b409d22945d55e0\u_ila_1_CV.dcp (466274, 2016-07-22)
LCD1602_UART\UART_BASESYSTEM\UART_BASESYSTEM.cache\ip\acec5bfb1433ad1e\acec5bfb1433ad1e.xci (397718, 2016-07-22)
LCD1602_UART\UART_BASESYSTEM\UART_BASESYSTEM.cache\ip\acec5bfb1433ad1e\u_ila_0_CV.dcp (579285, 2016-07-22)
LCD1602_UART\UART_BASESYSTEM\UART_BASESYSTEM.cache\ip\ae2047275900e046\ae2047275900e046.xci (397718, 2016-07-22)
LCD1602_UART\UART_BASESYSTEM\UART_BASESYSTEM.cache\ip\ae2047275900e046\u_ila_2_CV.dcp (472016, 2016-07-22)
LCD1602_UART\UART_BASESYSTEM\UART_BASESYSTEM.cache\ip\b347d797319ca71b\b347d797319ca71b.xci (397719, 2016-07-22)
LCD1602_UART\UART_BASESYSTEM\UART_BASESYSTEM.cache\ip\b347d797319ca71b\u_ila_1_CV.dcp (881709, 2016-07-22)
LCD1602_UART\UART_BASESYSTEM\UART_BASESYSTEM.cache\ip\d15c88ff7763c51d\d15c88ff7763c51d.xci (6214, 2016-07-22)
LCD1602_UART\UART_BASESYSTEM\UART_BASESYSTEM.cache\ip\d15c88ff7763c51d\dbg_hub_CV.dcp (248425, 2016-07-22)
LCD1602_UART\UART_BASESYSTEM\UART_BASESYSTEM.cache\ip\e54c87bc62adcb1c\e54c87bc62adcb1c.xci (397718, 2016-07-19)
LCD1602_UART\UART_BASESYSTEM\UART_BASESYSTEM.cache\ip\e54c87bc62adcb1c\u_ila_1_CV.dcp (594440, 2016-07-19)
LCD1602_UART\UART_BASESYSTEM\UART_BASESYSTEM.cache\ip\fc9cbf97ec05c49a\fc9cbf97ec05c49a.xci (397719, 2016-07-19)
LCD1602_UART\UART_BASESYSTEM\UART_BASESYSTEM.cache\ip\fc9cbf97ec05c49a\u_ila_1_CV.dcp (488456, 2016-07-19)
LCD1602_UART\UART_BASESYSTEM\UART_BASESYSTEM.cache\wt\java_command_handlers.wdf (4828, 2016-11-28)
LCD1602_UART\UART_BASESYSTEM\UART_BASESYSTEM.cache\wt\project.wpc (61, 2016-11-28)
LCD1602_UART\UART_BASESYSTEM\UART_BASESYSTEM.cache\wt\synthesis.wdf (11, 2016-11-28)
... ...
The files in this directory structure are automatically generated and managed by Vivado. Editing these files is not recommended.
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