新建 WinRAR ZIP 压缩文件
所属分类：VHDL/FPGA/Verilog
开发工具：Quartus II
文件大小：290KB
下载次数：1
上传日期：2017-11-06 22:55:06
上 传 者：
打好额速度
说明： 实现跨时钟域数据传输的异步fifo，和i2c总线控制器。
(Asynchronous FIFO and I2C bus controller for cross clock domain data transmission.)
文件列表:
asy_FIFO (0, 2017-06-05)
asy_FIFO\asy_FIFO.qpf (1286, 2017-05-31)
asy_FIFO\asy_FIFO.qsf (3398, 2017-06-05)
asy_FIFO\asy_FIFO.qws (694, 2017-06-05)
asy_FIFO\asy_FIFO.v (2541, 2017-06-02)
asy_FIFO\asy_FIFO.v.bak (1985, 2017-05-31)
asy_FIFO\asy_FIFO_assignment_defaults.qdf (57531, 2017-06-05)
asy_FIFO\db (0, 2017-06-05)
asy_FIFO\db\asy_FIFO.db_info (155, 2017-06-05)
asy_FIFO\db\asy_FIFO.ipinfo (178, 2017-06-05)
asy_FIFO\db\asy_FIFO.sim.vwf (15878, 2017-06-02)
asy_FIFO\db\asy_FIFO.sld_design_entry.sci (217, 2017-06-05)
asy_FIFO\db\logic_util_heursitic.dat (9416, 2017-06-02)
asy_FIFO\db\prev_cmp_asy_FIFO.qmsg (3933, 2017-06-02)
asy_FIFO\incremental_db (0, 2017-05-31)
asy_FIFO\incremental_db\compiled_partitions (0, 2017-06-05)
asy_FIFO\incremental_db\compiled_partitions\asy_FIFO.db_info (155, 2017-06-05)
asy_FIFO\output_files (0, 2017-06-02)
asy_FIFO\output_files\asy_FIFO.asm.rpt (7804, 2017-06-02)
asy_FIFO\output_files\asy_FIFO.done (26, 2017-06-02)
asy_FIFO\output_files\asy_FIFO.eda.rpt (6018, 2017-06-02)
asy_FIFO\output_files\asy_FIFO.fit.rpt (198995, 2017-06-02)
asy_FIFO\output_files\asy_FIFO.fit.smsg (703, 2017-06-02)
asy_FIFO\output_files\asy_FIFO.fit.summary (622, 2017-06-02)
asy_FIFO\output_files\asy_FIFO.flow.rpt (8551, 2017-06-02)
asy_FIFO\output_files\asy_FIFO.jdi (227, 2017-06-02)
asy_FIFO\output_files\asy_FIFO.map.rpt (22384, 2017-06-02)
asy_FIFO\output_files\asy_FIFO.map.summary (476, 2017-06-02)
asy_FIFO\output_files\asy_FIFO.pin (78712, 2017-06-02)
asy_FIFO\output_files\asy_FIFO.pof (2097374, 2017-06-02)
asy_FIFO\output_files\asy_FIFO.sim.rpt (32171, 2017-06-02)
asy_FIFO\output_files\asy_FIFO.sof (841438, 2017-06-02)
asy_FIFO\output_files\asy_FIFO.sta.rpt (172648, 2017-06-02)
asy_FIFO\output_files\asy_FIFO.sta.summary (1080, 2017-06-02)
asy_FIFO\simulation (0, 2017-05-31)
asy_FIFO\simulation\modelsim (0, 2017-06-02)
asy_FIFO\simulation\modelsim\asy_FIFO.sft (176, 2017-06-02)
asy_FIFO\simulation\modelsim\asy_FIFO.vo (116523, 2017-06-02)
asy_FIFO\simulation\modelsim\asy_FIFO_8_1200mv_0c_slow.vo (109722, 2017-05-31)
... ...
This folder contains data for incremental compilation.
The compiled_partitions sub-folder contains previous compilation results for each partition.
As long as this folder is preserved, incremental compilation results from earlier compiles
can be re-used. To perform a clean compilation from source files for all partitions, both
the db and incremental_db folder should be removed.
The imported_partitions sub-folder contains the last imported QXP for each imported partition.
As long as this folder is preserved, imported partitions will be automatically re-imported
when the db or incremental_db/compiled_partitions folders are removed.
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