文件列表:

UMC 05um technology files for Tanner Pro\9905SPICE.MD (57644, 1999-06-15)
UMC 05um technology files for Tanner Pro\9905spice.model (57644, 1999-06-15)
UMC 05um technology files for Tanner Pro\LIST.TXT (787, 2005-05-21)
UMC 05um technology files for Tanner Pro\PAD05.SDB (108294, 1997-12-23)
UMC 05um technology files for Tanner Pro\PAD05.TDB (682770, 1999-06-07)
UMC 05um technology files for Tanner Pro\UMC05.EXT (3260, 1997-09-24)
UMC 05um technology files for Tanner Pro\UMC05.TDB (27405, 1999-06-07)
UMC 05um technology files for Tanner Pro\UMC05.XST (1708, 1998-05-22)
UMC 05um technology files for Tanner Pro\UMC05C.EXT (4916, 1997-09-24)
UMC 05um technology files for Tanner Pro\UMC05C.TDB (27421, 1999-06-07)
UMC 05um technology files for Tanner Pro\UMC05LVS.MD (139, 2000-01-04)
UMC 05um technology files for Tanner Pro\UMC05NP.TDB (25282, 1999-06-07)
UMC 05um technology files for Tanner Pro\umc05_49.md (27157, 1997-11-27)
UMC 05um technology files for Tanner Pro\y2kpad052p2m.tdb (767730, 2000-02-29)
UMC 05um technology files for Tanner Pro (0, 2005-05-21)

一. DRC無法check的部份及解決方案 1. A.1B - DIFFUSION WIDTH (FOR INTERCONNECT) 0.5um 無法判斷DIFFUSION為Device or interconnect, 故不check 1B, DIFFUSION width之check以1A為主 2. A.1H - Minimum field isolation area 2.0um^2 A.1I - Minimum diffusion area 1.0um^2 Tanner無法檢知面積, 故此二條rules不予check 3. A.2B - N-Well to N-Well spacing (equal potential) 0 or >1.4um A.2C - N-Well to N-Well spacing (non-equal potential) 4.0um Tanner無法檢知電位, 故N-Well的距離以2B為主 4. A.5I - POLY2 width for analog N/PMOS 1.5um 無法判斷是否為analog, 故此rule不check 5. A.5H - Maximum POLY2 area on diffusion 100*100 A.5L - Maximum POLY2 capacitor area 100*100 若一邊小於等於100um, 則不管另一邊為多長,皆無法偵測錯誤 6. A.5.NOTE1 - POLY2 CROSS OVER POLY1 IS NOT ALLOWED. A.5.NOTE2 - POLY2 INSIDE BONDING PAD IS NOT ALLOWED. 這兩條 rules 無法 check. 7. A.8.NOTE - MAXIMUM CURRENT DENSITY - 1.5 mA/CONTACT Tanner 無法判斷電流大小 8. A.9C.c - METAL1 OVERLAP CONTACT METAL1 WIDTH IS EQUAL OR LARGER THAN 10 um - 0.8 無法 check. 9. A.9D - METAL1 POWER LINE WIDTH 20 Tanner 無法判定何者為 power line. 10. A.9E METAL1 DUMMY PATTERN: 無法 check. 11. A.9.NOTE1 - MAXIMUM CURRENT DENSITY - 0.8 mA/um Tanner 無法判斷電流大小 12. A.10C.c - METAL1 OVERLAP MVIA METAL1 WIDTH IS EQUAL OR LARGER THAN 10 um - 0.8 無法 check. 13. A.10.NOTE1 - MAXIMUM CURRENT DENSITY - 1.5 mA/VIA Tanner 無法判斷電流大小 14. A.10.NOTE2 - THE MVIA SIZE LARGER THAN 0.55*0.55 um^2 CAN ONLY BE USED IN PROTECTION CIRCUIT A.10.NOTE3 - METAL LAYERS MUST CONNECT THROUGH MVIA ONLY Tanner 無法判斷上面情形 15. A.11C.c - METAL2 OVERLAP MVIA METAL2 WIDTH IS EQUAL OR LARGER THAN 10 um - 0.8 無法 check. 16. A.11.NOTE1 - MAXIMUM CURRENT DENSITY - 1.5 mA/VIA Tanner 無法判斷電流大小 17. A.11.NOTE2 - METAL2 CAN BE CONNECTED TO METAL1 ONLY Tanner 無法判斷上面情形 18. A.12 A.12 所有的rules CIC並不採用，請用CIC的方法產生電阻 19. Pad window layer中1D, 1F, 1K, 1L 無法check B.1D - Pad metal to scribe line edge space 20(Typical) B.1F - Pad metal width at junction of interconnect line and pad metal 20 B.1K - METAL1 TO PAD WINDOW SPACING 1 B.1L - IF PAD PITCH SIZE IS 115um, PAD METAL TO METAL SPACING 15 二. Extract 1. 目前可extract的元件有 NMOS, PMOS, GPOLY Resistor, CPOLY Resistor, N Diffusion Resistor, P Diffusion Resistor, N Well Resistor。 GPOLY - CPOLY Capacitor 2. Parasitic Capacitance 方面可 extract 的 parasitic capacitor 有 Metal2 - Metal1 Metal2 - GPoly Metal2 - CPoly Metal2 - P WELL Metal1 - GPoly Metal1 - CPoly GPoly - P WELL

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