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AdsSimpleDesign_3S1000_07Oct04.zip (637434, 2004-10-07)
Ads5273SimpleDesign_07Oct04.zip (2014655, 2004-10-07)

******************************************************************************* ** Copyright Year of First Publication, Years of Each Revision, Xilinx, Inc. ** This design is confidential and proprietary of Xilinx, Inc. All Rights Reserved. ******************************************************************************* ** ____ ____ ** / /\/ / ** /___/ \ / Vendor: Xilinx ** \ \ \/ Version: 1.0 ** \ \ Filename: Xapp774_Readme.txt ** / / Date Last Modified: ** /___/ /\ Date Created: 24/02/06 ** \ \ / \ ** \___\/\___\ ** ** Device: Virtex-II, Virtex-IIpro and Spartan-3 ** Purpose: Provide an interface to connect a Texas Instruments ADS527x ** Analog to digital converter to a Xilinx FPGA. ** Reference: ** ******************************************************************************* ** ** Disclaimer: LIMITED WARRANTY AND DISCLAMER. These designs are ** provided to you "as is." Xilinx and its licensors make and you ** receive no warranties or conditions, express, implied, ** statutory or otherwise, and Xilinx specifically disclaims any ** implied warranties of merchantability, noninfringement, or ** fitness for a particular purpose. Xilinx does not warrant that ** the functions contained in these designs will meet your ** requirements, or that the operation of these designs will be ** uninterrupted or error free, or that defects in the Designs ** will be corrected. Furthermore, Xilinx does not warrant or ** make any representations regarding use or the results of the ** use of the designs in terms of correctness, accuracy, ** reliability, or otherwise. ** ** LIMITATION OF LIABILITY. In no event will Xilinx or its ** licensors be liable for any loss of data, lost profits, cost ** or procurement of substitute goods or services, or for any ** special, incidental, consequential, or indirect damages ** arising from the use or operation of the designs or ** accompanying documentation, however caused and on any theory ** of liability. This limitation will apply even if Xilinx ** has been advised of the possibility of such damage. This ** limitation shall apply notwithstanding the failure of the ** essential purpose of any limited remedies herein. ** ******************************************************************************* This readme describes how to use the files that come with XAPP. ******************************************************************************* This zip file contains two other zip files. Each of the zip files contains a design for connecting the ADS analog-to-digital converter to a Xilinx Virtex-II(pro) or Spartan-3 AdsSimpleDesign_07Oct04.zip contains the Virtex-II(pro) design for the Texas Instruments ADS527xEVM_ADSDeSer-50EVM demo board combination. AdsSimpleDesign_3S1000_07Oct04.zip contains the same design as the above, but now targetted to the Spartan-3 device of a Spartan demo board. ******************************************************************************* Kind regards, Marc

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