AXI-HP-ZYNQ
所属分类：VHDL/FPGA/Verilog
开发工具：Verilog
文件大小：31762KB
下载次数：71
上传日期：2018-01-21 15:49:09
上 传 者：
刘小娃
说明： 用Vivado IPI搭建的Zynq-7000 PS到PL通信过程，使用了AXI-HP接口，利用AXI-DMA IP实现直接读写DDR的过程，软件可以配置传输尺寸。
(The Zynq-7000 PS to PL communication process is built by Vivado IPI. AXI-HP interface is used, and AXI-DMA IP is used to read and write DDR directly. The software can configure the transmission size.)
文件列表:
AXI-HP-ZYNQ\BOOT.bin (38668, 2015-08-05)
AXI-HP-ZYNQ\output.bif (134, 2015-08-05)
AXI-HP-ZYNQ\zynq_hello_world_sd_boot.cache\wt\gui_resources.wdf (740, 2018-01-20)
AXI-HP-ZYNQ\zynq_hello_world_sd_boot.cache\wt\java_command_handlers.wdf (769, 2018-01-20)
AXI-HP-ZYNQ\zynq_hello_world_sd_boot.cache\wt\project.wpc (61, 2018-01-20)
AXI-HP-ZYNQ\zynq_hello_world_sd_boot.cache\wt\synthesis.wdf (3760, 2015-08-08)
AXI-HP-ZYNQ\zynq_hello_world_sd_boot.cache\wt\synthesis_details.wdf (100, 2015-08-08)
AXI-HP-ZYNQ\zynq_hello_world_sd_boot.cache\wt\webtalk_pa.xml (2213, 2018-01-20)
AXI-HP-ZYNQ\zynq_hello_world_sd_boot.hw\zynq_hello_world_sd_boot.lpr (290, 2015-08-04)
AXI-HP-ZYNQ\zynq_hello_world_sd_boot.runs\.jobs\vrs_config_1.xml (244, 2015-08-04)
AXI-HP-ZYNQ\zynq_hello_world_sd_boot.runs\.jobs\vrs_config_2.xml (244, 2015-08-05)
AXI-HP-ZYNQ\zynq_hello_world_sd_boot.runs\.jobs\vrs_config_3.xml (258, 2015-08-05)
AXI-HP-ZYNQ\zynq_hello_world_sd_boot.runs\.jobs\vrs_config_4.xml (265, 2015-08-05)
AXI-HP-ZYNQ\zynq_hello_world_sd_boot.runs\.jobs\vrs_config_5.xml (244, 2015-08-08)
AXI-HP-ZYNQ\zynq_hello_world_sd_boot.runs\.jobs\vrs_config_6.xml (258, 2015-08-08)
AXI-HP-ZYNQ\zynq_hello_world_sd_boot.runs\.jobs\vrs_config_7.xml (265, 2015-08-08)
AXI-HP-ZYNQ\zynq_hello_world_sd_boot.runs\impl_1\.init_design.begin.rst (174, 2015-08-08)
AXI-HP-ZYNQ\zynq_hello_world_sd_boot.runs\impl_1\.init_design.end.rst (0, 2015-08-08)
AXI-HP-ZYNQ\zynq_hello_world_sd_boot.runs\impl_1\.opt_design.begin.rst (174, 2015-08-08)
AXI-HP-ZYNQ\zynq_hello_world_sd_boot.runs\impl_1\.opt_design.end.rst (0, 2015-08-08)
AXI-HP-ZYNQ\zynq_hello_world_sd_boot.runs\impl_1\.place_design.begin.rst (174, 2015-08-08)
AXI-HP-ZYNQ\zynq_hello_world_sd_boot.runs\impl_1\.place_design.end.rst (0, 2015-08-08)
AXI-HP-ZYNQ\zynq_hello_world_sd_boot.runs\impl_1\.route_design.begin.rst (174, 2015-08-08)
AXI-HP-ZYNQ\zynq_hello_world_sd_boot.runs\impl_1\.route_design.end.rst (0, 2015-08-08)
AXI-HP-ZYNQ\zynq_hello_world_sd_boot.runs\impl_1\.vivado.begin.rst (346, 2015-08-08)
AXI-HP-ZYNQ\zynq_hello_world_sd_boot.runs\impl_1\.vivado.end.rst (0, 2015-08-08)
AXI-HP-ZYNQ\zynq_hello_world_sd_boot.runs\impl_1\.Vivado_Implementation.queue.rst (0, 2015-08-08)
AXI-HP-ZYNQ\zynq_hello_world_sd_boot.runs\impl_1\.write_bitstream.begin.rst (174, 2015-08-08)
AXI-HP-ZYNQ\zynq_hello_world_sd_boot.runs\impl_1\.write_bitstream.end.rst (0, 2015-08-08)
AXI-HP-ZYNQ\zynq_hello_world_sd_boot.runs\impl_1\design_1_wrapper.bit (4045676, 2015-08-08)
AXI-HP-ZYNQ\zynq_hello_world_sd_boot.runs\impl_1\design_1_wrapper.hwdef (377015, 2015-08-08)
AXI-HP-ZYNQ\zynq_hello_world_sd_boot.runs\impl_1\design_1_wrapper.sysdef (519706, 2015-08-08)
AXI-HP-ZYNQ\zynq_hello_world_sd_boot.runs\impl_1\design_1_wrapper.tcl (1878, 2015-08-08)
AXI-HP-ZYNQ\zynq_hello_world_sd_boot.runs\impl_1\design_1_wrapper.vdi (160563, 2015-08-08)
AXI-HP-ZYNQ\zynq_hello_world_sd_boot.runs\impl_1\design_1_wrapper_2032.backup.vdi (93239, 2015-08-08)
AXI-HP-ZYNQ\zynq_hello_world_sd_boot.runs\impl_1\design_1_wrapper_3000.backup.vdi (21753, 2015-08-05)
AXI-HP-ZYNQ\zynq_hello_world_sd_boot.runs\impl_1\design_1_wrapper_clock_utilization_routed.rpt (11456, 2015-08-08)
AXI-HP-ZYNQ\zynq_hello_world_sd_boot.runs\impl_1\design_1_wrapper_control_sets_placed.rpt (163215, 2015-08-08)
AXI-HP-ZYNQ\zynq_hello_world_sd_boot.runs\impl_1\design_1_wrapper_drc_opted.rpt (66890, 2015-08-08)
AXI-HP-ZYNQ\zynq_hello_world_sd_boot.runs\impl_1\design_1_wrapper_drc_routed.pb (74, 2015-08-08)
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