A4_Clock
所属分类：VHDL/FPGA/Verilog
开发工具：Verilog
文件大小：3451KB
下载次数：1
上传日期：2018-02-13 20:22:22
上 传 者：
DSP新手
说明： 基于Altera的Cyclone4的时钟程序
(clock program based on Cyclone4 of Altera)
文件列表:
A4_Clock_Top (0, 2017-09-30)
A4_Clock_Top\A4_Clock_Top.qpf (1287, 2017-09-29)
A4_Clock_Top\A4_Clock_Top.qsf (4376, 2017-09-30)
A4_Clock_Top\A4_Clock_Top.qws (2839, 2017-09-30)
A4_Clock_Top\A4_Clock_Top.v (2703, 2017-09-30)
A4_Clock_Top\A4_Clock_Top.v.bak (66, 2017-09-29)
A4_Clock_Top\Beep_Module.v (1749, 2017-09-29)
A4_Clock_Top\Beep_Module.v.bak (35, 2017-09-29)
A4_Clock_Top\Counter_Module.v (4552, 2017-09-30)
A4_Clock_Top\Counter_Module.v.bak (30, 2017-09-29)
A4_Clock_Top\Key_Module.v (2786, 2017-09-30)
A4_Clock_Top\Key_Module.v.bak (26, 2017-09-29)
A4_Clock_Top\Segled_Module.v (3302, 2017-09-30)
A4_Clock_Top\Segled_Module.v.bak (22, 2017-09-29)
A4_Clock_Top\db (0, 2017-09-30)
A4_Clock_Top\db\.cmp.kpt (208, 2017-09-30)
A4_Clock_Top\db\A4_Clock_Top.(0).cnf.cdb (2440, 2017-09-30)
A4_Clock_Top\db\A4_Clock_Top.(0).cnf.hdb (1438, 2017-09-30)
A4_Clock_Top\db\A4_Clock_Top.(1).cnf.cdb (3713, 2017-09-30)
A4_Clock_Top\db\A4_Clock_Top.(1).cnf.hdb (1885, 2017-09-30)
A4_Clock_Top\db\A4_Clock_Top.(2).cnf.cdb (4690, 2017-09-30)
A4_Clock_Top\db\A4_Clock_Top.(2).cnf.hdb (1577, 2017-09-30)
A4_Clock_Top\db\A4_Clock_Top.(3).cnf.cdb (2971, 2017-09-29)
A4_Clock_Top\db\A4_Clock_Top.(3).cnf.hdb (1478, 2017-09-29)
A4_Clock_Top\db\A4_Clock_Top.(4).cnf.cdb (3074, 2017-09-30)
A4_Clock_Top\db\A4_Clock_Top.(4).cnf.hdb (1527, 2017-09-30)
A4_Clock_Top\db\A4_Clock_Top.asm.qmsg (2505, 2017-09-30)
A4_Clock_Top\db\A4_Clock_Top.asm.rdb (1387, 2017-09-30)
A4_Clock_Top\db\A4_Clock_Top.asm_labs.ddb (8758, 2017-09-30)
A4_Clock_Top\db\A4_Clock_Top.cbx.xml (94, 2017-09-30)
A4_Clock_Top\db\A4_Clock_Top.cmp.bpm (859, 2017-09-30)
A4_Clock_Top\db\A4_Clock_Top.cmp.cdb (32955, 2017-09-30)
A4_Clock_Top\db\A4_Clock_Top.cmp.hdb (16484, 2017-09-30)
A4_Clock_Top\db\A4_Clock_Top.cmp.idb (4945, 2017-09-30)
A4_Clock_Top\db\A4_Clock_Top.cmp.logdb (14956, 2017-09-30)
A4_Clock_Top\db\A4_Clock_Top.cmp.rdb (21576, 2017-09-30)
A4_Clock_Top\db\A4_Clock_Top.cmp_merge.kpt (213, 2017-09-30)
A4_Clock_Top\db\A4_Clock_Top.cycloneive_io_sim_cache.45um_ff_1200mv_0c_fast.hsd (746815, 2017-09-30)
A4_Clock_Top\db\A4_Clock_Top.cycloneive_io_sim_cache.45um_ss_1200mv_0c_slow.hsd (744889, 2017-09-30)
A4_Clock_Top\db\A4_Clock_Top.cycloneive_io_sim_cache.45um_ss_1200mv_85c_slow.hsd (740697, 2017-09-30)
... ...
This folder contains data for incremental compilation.
The compiled_partitions sub-folder contains previous compilation results for each partition.
As long as this folder is preserved, incremental compilation results from earlier compiles
can be re-used. To perform a clean compilation from source files for all partitions, both
the db and incremental_db folder should be removed.
The imported_partitions sub-folder contains the last imported QXP for each imported partition.
As long as this folder is preserved, imported partitions will be automatically re-imported
when the db or incremental_db/compiled_partitions folders are removed.
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