Altera-7-segment-Control
所属分类：VHDL/FPGA/Verilog
开发工具：VHDL
文件大小：757KB
下载次数：5
上传日期：2011-05-06 12:04:53
上 传 者：
s494949
说明： Altera DE2 Board 7-Segment control
文件列表:
HW1\ctrl.vhd (1563, 2011-02-04)
HW1\ctrl.vhd.bak (1354, 2011-02-04)
HW1\db\altsyncram_o861.tdf (8644, 2011-02-03)
HW1\db\DE2_TOP.(0).cnf.cdb (7695, 2011-02-04)
HW1\db\DE2_TOP.(0).cnf.hdb (3361, 2011-02-04)
HW1\db\DE2_TOP.(1).cnf.cdb (6606, 2011-02-04)
HW1\db\DE2_TOP.(1).cnf.hdb (1187, 2011-02-04)
HW1\db\DE2_TOP.(2).cnf.cdb (1702, 2011-02-03)
HW1\db\DE2_TOP.(2).cnf.hdb (753, 2011-02-03)
HW1\db\DE2_TOP.(3).cnf.cdb (1307, 2011-02-04)
HW1\db\DE2_TOP.(3).cnf.hdb (525, 2011-02-04)
HW1\db\DE2_TOP.(4).cnf.cdb (1334, 2011-02-03)
HW1\db\DE2_TOP.(4).cnf.hdb (847, 2011-02-03)
HW1\db\DE2_TOP.(5).cnf.cdb (1231, 2011-02-03)
HW1\db\DE2_TOP.(5).cnf.hdb (750, 2011-02-03)
HW1\db\DE2_TOP.(6).cnf.cdb (1365, 2011-02-03)
HW1\db\DE2_TOP.(6).cnf.hdb (669, 2011-02-03)
HW1\db\DE2_TOP.(7).cnf.cdb (1330, 2011-02-03)
HW1\db\DE2_TOP.(7).cnf.hdb (848, 2011-02-03)
HW1\db\DE2_TOP.asm.qmsg (1833, 2011-02-04)
HW1\db\DE2_TOP.asm_labs.ddb (463673, 2011-02-04)
HW1\db\DE2_TOP.cbx.xml (198, 2011-02-04)
HW1\db\DE2_TOP.cmp.bpm (3611, 2011-02-04)
HW1\db\DE2_TOP.cmp.cdb (33482, 2011-02-04)
HW1\db\DE2_TOP.cmp.ecobp (28, 2011-02-04)
HW1\db\DE2_TOP.cmp.hdb (23694, 2011-02-04)
HW1\db\DE2_TOP.cmp.logdb (3, 2011-02-04)
HW1\db\DE2_TOP.cmp.rdb (48483, 2011-02-04)
HW1\db\DE2_TOP.cmp.tdb (39268, 2011-02-04)
HW1\db\DE2_TOP.cmp0.ddb (112330, 2011-02-04)
HW1\db\DE2_TOP.cmp_bb.cdb (16006, 2011-02-04)
HW1\db\DE2_TOP.cmp_bb.hdb (23606, 2011-02-04)
HW1\db\DE2_TOP.cmp_bb.logdb (3, 2011-02-04)
HW1\db\DE2_TOP.cmp_bb.rcf (5827, 2011-02-04)
HW1\db\DE2_TOP.dbp (0, 2011-02-04)
HW1\db\DE2_TOP.db_info (134, 2011-01-27)
HW1\db\DE2_TOP.eco.cdb (161, 2011-02-04)
HW1\db\DE2_TOP.eda.qmsg (1931, 2011-02-04)
HW1\db\DE2_TOP.fit.qmsg (675043, 2011-02-04)
HW1\db\DE2_TOP.hier_info (15955, 2011-02-04)
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