密码锁
所属分类:VHDL/FPGA/Verilog
开发工具:Quartus II
文件大小:15760KB
下载次数:3
上传日期:2018-04-26 10:22:36
上 传 者:
罗君
说明: 程序通过采集输入信息,与FPGA的存储值进行比较,如果密码正确,则开锁电路打开;如果密码错误,锁不打开,并且计数器进行+1操作;累计3次输入密码错误,给警报一个高电平,让其报警。
(By collecting input information, the program compares with the storage value of FPGA. If the password is correct, the unlocked circuit opens; if the password is wrong, the lock is not open, and the counter performs the +1 operation; the cumulative 3 time input password error gives the alarm a high level and allows the alarm to be sent to the alarm.)
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工程实训报告哈.doc (18358406, 2018-01-22)
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