hardware-description-languages

所属分类:VHDL/FPGA/Verilog
开发工具:Verilog
文件大小:707KB
下载次数:0
上传日期:2018-06-02 19:03:40
上 传 者sh-1993
说明:  Verilog和VHDL编程语言硬件描述语言课程的编码实验室作业。
(Coding lab assignments of Hardware Description Languages course in Verilog and VHDL programming languages.)

文件列表:
LAB1-FVC-Intra-Prediction (0, 2018-06-03)
LAB1-FVC-Intra-Prediction\ee310_lab1_spr18.pdf (131924, 2018-06-03)
LAB1-FVC-Intra-Prediction\intra_pred_equations.txt (584, 2018-06-03)
LAB1-FVC-Intra-Prediction\intra_predictor.v (2958, 2018-06-03)
LAB1-FVC-Intra-Prediction\ip_test.v (2038, 2018-06-03)
LAB2-FVC-Intra-Prediction-Sequential (0, 2018-06-03)
LAB2-FVC-Intra-Prediction-Sequential\ee310_lab2_spr18.pdf (240333, 2018-06-03)
LAB2-FVC-Intra-Prediction-Sequential\intra_predictor_seq.v (12295, 2018-06-03)
LAB2-FVC-Intra-Prediction-Sequential\intra_predictor_seq_test.v (2353, 2018-06-03)
LAB3-FloatingAndFixedPointArithmaticRTL (0, 2018-06-03)
LAB3-FloatingAndFixedPointArithmaticRTL\EE310_Spr18_Lab3.pdf (113309, 2018-06-03)
LAB3-FloatingAndFixedPointArithmaticRTL\buttonCorrect.v (934, 2018-06-03)
LAB3-FloatingAndFixedPointArithmaticRTL\lcdi.v (6007, 2018-06-03)
LAB3-FloatingAndFixedPointArithmaticRTL\pins.ucf (976, 2018-06-03)
LAB3-FloatingAndFixedPointArithmaticRTL\top_mod.bit (283868, 2018-06-03)
LAB3-FloatingAndFixedPointArithmaticRTL\top_mod.v (989, 2018-06-03)
LAB3-FloatingAndFixedPointArithmaticRTL\v1.v (8577, 2018-06-03)
LAB3-FloatingAndFixedPointArithmaticRTL\v1_test.v (985, 2018-06-03)
LAB4-Image-Shear-Transform (0, 2018-06-03)
LAB4-Image-Shear-Transform\EE310_Spr18_Lab4.pdf (225357, 2018-06-03)
LAB4-Image-Shear-Transform\block_ram.v (767, 2018-06-03)
LAB4-Image-Shear-Transform\display_template.v (4221, 2018-06-03)
LAB4-Image-Shear-Transform\lena_input.ngc (56695, 2018-06-03)
LAB4-Image-Shear-Transform\lena_input.v (5817, 2018-06-03)
LAB4-Image-Shear-Transform\pins.ucf (829, 2018-06-03)
LAB4-Image-Shear-Transform\vga_controller_640_60.v (5034, 2018-06-03)

# hardware-description-languages Coding lab assignments of Hardware Description Languages course in Verilog and VHDL programming languages. # Lena ![Lena](https://www.researchgate.net/profile/Costin-Anton_Boiangiu/publication/260076060/figure/fig3/AS:297202***8928265@1447870041608/Lena-input-image.png)

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