array(5) {
  [0]=>
  string(44) "100 Power Tips for FPGA Designers - Stavinov"
  [1]=>
  string(52) " Evgeni\100 Power Tips for FPGA Designers - Stavinov"
  [2]=>
  string(12) " Evgeni.mobi"
  [3]=>
  string(8) " 7544016"
  [4]=>
  string(21) " 2012-07-13 09:57:5
"
}
array(4) {
  [0]=>
  string(44) "100 Power Tips for FPGA Designers - Stavinov"
  [1]=>
  string(33) " Evgeni\FBReaderSetup-0.12.10.exe"
  [2]=>
  string(8) " 5337840"
  [3]=>
  string(21) " 2010-04-06 11:10:0
"
}
array(4) {
  [0]=>
  string(44) "100 Power Tips for FPGA Designers - Stavinov"
  [1]=>
  string(18) " Evgeni\readme.txt"
  [2]=>
  string(4) " 169"
  [3]=>
  string(21) " 2012-10-28 14:26:3
"
}
array(4) {
  [0]=>
  string(44) "100 Power Tips for FPGA Designers - Stavinov"
  [1]=>
  string(51) " Evgeni\src_book\13.14.15.coding\rtl\coding_style.v"
  [2]=>
  string(5) " 3693"
  [3]=>
  string(21) " 2011-03-14 12:43:4
"
}
array(4) {
  [0]=>
  string(44) "100 Power Tips for FPGA Designers - Stavinov"
  [1]=>
  string(45) " Evgeni\src_book\13.14.15.coding\rtl\simple.v"
  [2]=>
  string(5) " 2031"
  [3]=>
  string(21) " 2011-03-14 10:26:4
"
}
array(4) {
  [0]=>
  string(44) "100 Power Tips for FPGA Designers - Stavinov"
  [1]=>
  string(52) " Evgeni\src_book\13.14.15.coding\rtl\synth_support.v"
  [2]=>
  string(5) " 2057"
  [3]=>
  string(21) " 2011-03-14 17:32:1
"
}
array(4) {
  [0]=>
  string(44) "100 Power Tips for FPGA Designers - Stavinov"
  [1]=>
  string(41) " Evgeni\src_book\13.14.15.coding\rtl\tb.v"
  [2]=>
  string(5) " 1751"
  [3]=>
  string(21) " 2011-03-10 12:44:2
"
}
array(4) {
  [0]=>
  string(44) "100 Power Tips for FPGA Designers - Stavinov"
  [1]=>
  string(47) " Evgeni\src_book\13.14.15.coding\synth\isim.cmd"
  [2]=>
  string(3) " 18"
  [3]=>
  string(21) " 2011-03-14 10:26:5
"
}
array(4) {
  [0]=>
  string(44) "100 Power Tips for FPGA Designers - Stavinov"
  [1]=>
  string(48) " Evgeni\src_book\13.14.15.coding\synth\sim1.wcfg"
  [2]=>
  string(5) " 1158"
  [3]=>
  string(21) " 2011-02-25 14:01:0
"
}
array(4) {
  [0]=>
  string(44) "100 Power Tips for FPGA Designers - Stavinov"
  [1]=>
  string(48) " Evgeni\src_book\13.14.15.coding\synth\sim2.wcfg"
  [2]=>
  string(5) " 1809"
  [3]=>
  string(21) " 2011-03-14 10:17:2
"
}
array(4) {
  [0]=>
  string(44) "100 Power Tips for FPGA Designers - Stavinov"
  [1]=>
  string(49) " Evgeni\src_book\13.14.15.coding\synth\synth.xise"
  [2]=>
  string(5) " 6289"
  [3]=>
  string(21) " 2011-03-14 13:51:3
"
}
array(4) {
  [0]=>
  string(44) "100 Power Tips for FPGA Designers - Stavinov"
  [1]=>
  string(56) " Evgeni\src_book\13.14.15.coding\synth\synth_support.lso"
  [2]=>
  string(2) " 6"
  [3]=>
  string(21) " 2011-03-14 13:52:4
"
}
array(4) {
  [0]=>
  string(44) "100 Power Tips for FPGA Designers - Stavinov"
  [1]=>
  string(45) " Evgeni\src_book\16.inference\rtl\inference.v"
  [2]=>
  string(5) " 3660"
  [3]=>
  string(21) " 2011-03-11 13:17:5
"
}
array(4) {
  [0]=>
  string(44) "100 Power Tips for FPGA Designers - Stavinov"
  [1]=>
  string(49) " Evgeni\src_book\16.inference\synth\inference.lso"
  [2]=>
  string(2) " 6"
  [3]=>
  string(21) " 2011-03-11 10:34:3
"
}
array(4) {
  [0]=>
  string(44) "100 Power Tips for FPGA Designers - Stavinov"
  [1]=>
  string(50) " Evgeni\src_book\16.inference\synth\inference.ptwx"
  [2]=>
  string(6) " 16555"
  [3]=>
  string(21) " 2011-03-11 11:39:3
"
}
array(4) {
  [0]=>
  string(44) "100 Power Tips for FPGA Designers - Stavinov"
  [1]=>
  string(49) " Evgeni\src_book\16.inference\synth\inference.stx"
  [2]=>
  string(2) " 0"
  [3]=>
  string(21) " 2011-03-11 13:18:1
"
}
array(4) {
  [0]=>
  string(44) "100 Power Tips for FPGA Designers - Stavinov"
  [1]=>
  string(54) " Evgeni\src_book\16.inference\synth\inference.unroutes"
  [2]=>
  string(4) " 154"
  [3]=>
  string(21) " 2011-03-11 11:39:3
"
}
array(4) {
  [0]=>
  string(44) "100 Power Tips for FPGA Designers - Stavinov"
  [1]=>
  string(49) " Evgeni\src_book\16.inference\synth\inference.xpi"
  [2]=>
  string(3) " 46"
  [3]=>
  string(21) " 2011-03-11 11:39:3
"
}
array(4) {
  [0]=>
  string(44) "100 Power Tips for FPGA Designers - Stavinov"
  [1]=>
  string(53) " Evgeni\src_book\16.inference\synth\inference_map.mrp"
  [2]=>
  string(6) " 13501"
  [3]=>
  string(21) " 2011-03-11 11:39:1
"
}
array(4) {
  [0]=>
  string(44) "100 Power Tips for FPGA Designers - Stavinov"
  [1]=>
  string(64) " Evgeni\src_book\16.inference\synth\netgen\map\inference_map.sdf"
  [2]=>
  string(6) " 13306"
  [3]=>
  string(21) " 2011-03-11 11:14:4
"
}
array(4) {
  [0]=>
  string(44) "100 Power Tips for FPGA Designers - Stavinov"
  [1]=>
  string(62) " Evgeni\src_book\16.inference\synth\netgen\map\inference_map.v"
  [2]=>
  string(6) " 13014"
  [3]=>
  string(21) " 2011-03-11 11:14:5
"
}
array(4) {
  [0]=>
  string(44) "100 Power Tips for FPGA Designers - Stavinov"
  [1]=>
  string(74) " Evgeni\src_book\16.inference\synth\netgen\synthesis\inference_synthesis.v"
  [2]=>
  string(5) " 5776"
  [3]=>
  string(21) " 2011-03-11 10:40:5
"
}
array(4) {
  [0]=>
  string(44) "100 Power Tips for FPGA Designers - Stavinov"
  [1]=>
  string(46) " Evgeni\src_book\16.inference\synth\synth.xise"
  [2]=>
  string(5) " 5491"
  [3]=>
  string(21) " 2011-03-11 10:37:2
"
}
array(4) {
  [0]=>
  string(44) "100 Power Tips for FPGA Designers - Stavinov"
  [1]=>
  string(54) " Evgeni\src_book\17.mixed_verilog_vhdl\rtl\counter.vhd"
  [2]=>
  string(5) " 1630"
  [3]=>
  string(21) " 2011-01-24 17:28:4
"
}
array(4) {
  [0]=>
  string(44) "100 Power Tips for FPGA Designers - Stavinov"
  [1]=>
  string(47) " Evgeni\src_book\17.mixed_verilog_vhdl\rtl\tb.v"
  [2]=>
  string(5) " 1149"
  [3]=>
  string(21) " 2011-01-24 17:34:5
"
}
array(4) {
  [0]=>
  string(44) "100 Power Tips for FPGA Designers - Stavinov"
  [1]=>
  string(48) " Evgeni\src_book\17.mixed_verilog_vhdl\rtl\top.v"
  [2]=>
  string(5) " 1030"
  [3]=>
  string(21) " 2011-01-24 17:32:3
"
}
array(4) {
  [0]=>
  string(44) "100 Power Tips for FPGA Designers - Stavinov"
  [1]=>
  string(53) " Evgeni\src_book\17.mixed_verilog_vhdl\synth\isim.cmd"
  [2]=>
  string(3) " 18"
  [3]=>
  string(21) " 2011-01-24 17:35:1
"
}
array(4) {
  [0]=>
  string(44) "100 Power Tips for FPGA Designers - Stavinov"
  [1]=>
  string(55) " Evgeni\src_book\17.mixed_verilog_vhdl\synth\synth.xise"
  [2]=>
  string(5) " 6140"
  [3]=>
  string(21) " 2011-01-24 17:35:3
"
}
array(4) {
  [0]=>
  string(44) "100 Power Tips for FPGA Designers - Stavinov"
  [1]=>
  string(52) " Evgeni\src_book\17.mixed_verilog_vhdl\synth\top.lso"
  [2]=>
  string(2) " 6"
  [3]=>
  string(21) " 2011-01-24 17:31:4
"
}
array(4) {
  [0]=>
  string(44) "100 Power Tips for FPGA Designers - Stavinov"
  [1]=>
  string(53) " Evgeni\src_book\17.mixed_verilog_vhdl\synth\top.ptwx"
  [2]=>
  string(6) " 17226"
  [3]=>
  string(21) " 2011-01-24 17:37:5
"
}
array(4) {
  [0]=>
  string(44) "100 Power Tips for FPGA Designers - Stavinov"
  [1]=>
  string(52) " Evgeni\src_book\17.mixed_verilog_vhdl\synth\top.stx"
  [2]=>
  string(2) " 0"
  [3]=>
  string(21) " 2011-01-24 17:32:5
"
}
array(4) {
  [0]=>
  string(44) "100 Power Tips for FPGA Designers - Stavinov"
  [1]=>
  string(56) " Evgeni\src_book\17.mixed_verilog_vhdl\synth\top_map.mrp"
  [2]=>
  string(5) " 8822"
  [3]=>
  string(21) " 2011-01-24 17:37:4
"
}
array(4) {
  [0]=>
  string(44) "100 Power Tips for FPGA Designers - Stavinov"
  [1]=>
  string(45) " Evgeni\src_book\18.verilog\rtl\verilog2001.v"
  [2]=>
  string(5) " 2116"
  [3]=>
  string(21) " 2011-02-12 22:05:1
"
}
array(4) {
  [0]=>
  string(44) "100 Power Tips for FPGA Designers - Stavinov"
  [1]=>
  string(44) " Evgeni\src_book\18.verilog\synth\synth.xise"
  [2]=>
  string(5) " 5485"
  [3]=>
  string(21) " 2011-02-12 21:15:5
"
}
array(4) {
  [0]=>
  string(44) "100 Power Tips for FPGA Designers - Stavinov"
  [1]=>
  string(49) " Evgeni\src_book\18.verilog\synth\verilog2001.lso"
  [2]=>
  string(2) " 6"
  [3]=>
  string(21) " 2011-02-12 21:11:5
"
}
array(4) {
  [0]=>
  string(44) "100 Power Tips for FPGA Designers - Stavinov"
  [1]=>
  string(49) " Evgeni\src_book\18.verilog\synth\verilog2001.stx"
  [2]=>
  string(2) " 0"
  [3]=>
  string(21) " 2011-02-12 22:05:2
"
}
array(4) {
  [0]=>
  string(44) "100 Power Tips for FPGA Designers - Stavinov"
  [1]=>
  string(53) " Evgeni\src_book\18.verilog\synth\verilog2001_map.mrp"
  [2]=>
  string(6) " 41237"
  [3]=>
  string(21) " 2011-02-12 21:16:4
"
}
array(4) {
  [0]=>
  string(44) "100 Power Tips for FPGA Designers - Stavinov"
  [1]=>
  string(42) " Evgeni\src_book\20.21.clocking\cores\.lso"
  [2]=>
  string(3) " 18"
  [3]=>
  string(21) " 2011-01-05 17:22:4
"
}
array(4) {
  [0]=>
  string(44) "100 Power Tips for FPGA Designers - Stavinov"
  [1]=>
  string(47) " Evgeni\src_book\20.21.clocking\cores\blk_mem.v"
  [2]=>
  string(5) " 5085"
  [3]=>
  string(21) " 2011-01-05 17:23:1
"
}
array(4) {
  [0]=>
  string(44) "100 Power Tips for FPGA Designers - Stavinov"
  [1]=>
  string(49) " Evgeni\src_book\20.21.clocking\cores\blk_mem.xco"
  [2]=>
  string(5) " 2708"
  [3]=>
  string(21) " 2011-01-05 17:23:2
"
}

<!DOCTYPE html>
<html>

<head>
    <meta charset="utf-8">
    <meta name="viewport" content="width=device-width, initial-scale=1.0">
	<title>100 Power Tips for FPGA Designers  联合开发网 - pudn.com</title>

    <link href="/Public/m/css/bootstrap.min.css" rel="stylesheet">
    <link href="/Public/m/font-awesome/css/font-awesome.css" rel="stylesheet">

    <link href="/Public/m/css/animate.css" rel="stylesheet">
    <link href="/Public/m/css/style.css" rel="stylesheet">

	<link href="/Public/m/css/plugins/slick/slick.css" rel="stylesheet">
	<link href="/Public/m/css/plugins/slick/slick-theme.css" rel="stylesheet">

	

	<link href="/css/style.css" rel="stylesheet">

	<!-- Mainly scripts -->
	<script src="/Public/m/js/jquery-2.1.1.js"></script>
	<script src="/Public/m/js/bootstrap.min.js"></script>

	<script src="/Public/m/js/plugins/metisMenu/jquery.metisMenu.js"></script>
	<script src="/Public/m/js/plugins/slimscroll/jquery.slimscroll.min.js"></script>

	<!-- Custom and plugin javascript -->
	<script src="/Public/m/js/inspinia.js"></script>
	<script src="/Public/m/js/plugins/pace/pace.min.js"></script>
	
<META name="Keywords" content="100 Power Tips for FPGA Designers  实例 FPGA 实例 100 power tips  fpga 源码 fpga源码 程序员 编程 源码 源代码 下载">

	
<META name="Description" content="100 Power Tips for FPGA Designers  100个FPGA经典实例，含有源码，对正在学习FPGA的朋友应该很有帮助">

</head>

<body>

<!-- /.main-container start -->

<div class="pace  pace-inactive">
  	<div class="pace-progress" data-progress-text="100%" data-progress="99" style="transform: translate3d(100%, 0px, 0px);">
  	<div class="pace-progress-inner"></div>
	</div>
	<div class="pace-activity"></div>
</div>

<div class="all-content">
	<div class="my-container top-navigation">
		<nav class="navbar navbar-static-top" role="navigation">
			<div class="navbar-header">
				<button aria-controls="navbar" aria-expanded="false" data-target="#navbar" data-toggle="collapse" class="navbar-toggle collapsed" type="button">
					<i class="fa fa-reorder"></i>
				</button>
				<a href="http://www.pudn.com" class="navbar-brand">联合开发网</a>
			</div>
			<div class="navbar-collapse collapse" id="navbar">
				<ul class="nav navbar-nav">
					<li>
						<a href="/" style="padding-right:8px;padding-left:8px;font-size:16px">首页</a>
					</li>
					<li>
						<a href="https://search.pudn.com" style="padding-right:8px;padding-left:8px;font-size:16px">搜索</a>
					</li>
				</ul>
               	<ul class="nav navbar-top-links navbar-right">
               							<li>
                       	<a href="/User/login.html">
                           	&nbsp; <i class="fa fa-sign-out"></i>登录
                       	</a>
                   	</li>
                   	<li>
                       	<a href="/User/reg.html"><i class="fa fa-sign-out"></i>注册
                       	</a>
                   	</li>
					               	</ul>
			</div>
		</nav>
	</div>
	<form action="https://search.pudn.com/Download" method="get">
	<div class="top-menu-line2">
		<div class="my-container">
			<a href=/Download/upload.html>上传</a>
			&nbsp; <a href=/User>管理</a>
			&nbsp; <a href=https://search.pudn.com/Download>搜索</a>
			&nbsp; <a href=/Guestbook>留言</a>
			<div class="input-group pull-right" style="max-width:200px;margin:3px 15px 0px 0px">
				<input type="text" name="keyword" maxlength=20 placeholder="请输入关键字" class="form-control input-sm">
				<span class="input-group-btn"> <button type="submit" class="btn btn-white input-sm" style="border:1px solid #AAA"><i class="fa fa-search"></i></button>
				</span>
			</div>
		</div>
	</div></form>



<div class="row wrapper white-bg">
	<div class="my-container">
			<div class="nav-dir" style="padding:10px 0px">
				<a href="/">Pudn.com</a>&nbsp;&gt;&nbsp;下载中心
				&nbsp;&gt;&nbsp;VHDL/FPGA/Verilog				&nbsp;&gt;&nbsp;<font color=red>100 Power Tips for FPGA Designers </font>
			</div>


		<div class="row">
			<div class="col-xs-12 col-md-8">
				<div class="item-name">100 Power Tips for FPGA Designers </div>
				<div class="item-keyword">
					<a href="#" class="keyword" keyword="实例">实例</a>&nbsp;<a href="#" class="keyword" keyword="FPGA 实例">FPGA 实例</a>&nbsp;<a href="#" class="keyword" keyword="100 power tips ">100 power tips </a>&nbsp;<a href="#" class="keyword" keyword="fpga 源码">fpga 源码</a>&nbsp;<a href="#" class="keyword" keyword="fpga源码">fpga源码</a>&nbsp;				</div>
				<div class="item-action">
					<div class="btn-group">
						<a href=/Download/dl/id/1528768791394989 target=_blank class="btn btn-primary btn-sm"><i class="fa fa-download"></i> 下载(<span id="down-count">18</span>)</a>
						<a href="###" class="btn btn-white btn-sm vote-up"><i class="fa fa-thumbs-up"></i> 赞(<span id="vote-up-count">0</span>) </a>
						<a href="###" class="btn btn-white btn-sm vote-down"><i class="fa fa-thumbs-down"></i> 踩(<span id="vote-down-count">0</span>) </a>
						<a href="/Download/comment/id/1528768791394989" data-toggle="modal" data-target="#myModal" class="btn btn-white btn-sm"><i class="fa fa-comment"></i> 评论(<span id="comment-count">0</span>) </a>
						<a href="###" class="btn btn-white btn-sm favor-item"><i class="fa fa-heart"></i> 收藏(<span id="favor-count">0</span>) </a>
					</div>
				</div>
				<hr>

				<div class="item-info">
					<B>所属分类</B>：VHDL/FPGA/Verilog<BR>
					<B>开发工具</B>：Verilog<BR>
					<B>文件大小</B>：13118KB<BR>
					<B>下载次数</B>：18<BR>
					<B>上传日期</B>：2018-06-12 09:59:51<BR>
					<B>上 传 者</B>：<a href=/User/profile/id/1524398901969278.html>vmansus</a><BR>
				</div>
				<div class="item-intro">
					说明：&nbsp;&nbsp;100个FPGA经典实例，含有源码，对正在学习FPGA的朋友应该很有帮助<BR>(100 classic examples of FPGA, including source code, for learning FPGA friends should be very helpful.)				</div>
				<hr>
				<div><B>文件列表</B>: </div>
				<div id="file-list">
				... ...<BR>				</div>
				<hr>
				
				<div><B>近期下载者</B>：</div>
				<div id="download-users"></div>
				<hr>
				<div><B>相关文件</B>：</div>
				<div id="relate-items"></div>
				<hr>
				<div><B>评论</B>：[<a href=/Download/comment/id/1528768791394989.html data-toggle=modal data-target="#myModal">我要评论</a>]&nbsp;[<a class='pop-a' href=/Download/report/id/1528768791394989.html>举报此文件</a>]</div>
				<div id="file-comments"></div>
				<hr>
				<div><B>收藏者</B>：</div>
				<div id="favor-users"></div>
				<p></p>
			</div>

			<div class="col-xs-12 col-md-4">

				<div class="ad-sidebar text-center">
					<div class="ad-300">
					</div>
				</div>
			</div>
		</div>

	</div>
</div>



	<div class="my-footer">
		<div class="container">
		<div class="pull-right">
		</div>

		<div>
			
			<a href="http://www.pudn.com" target=_blank>© 联合开发网 from 2004</a> | 
			<a href="/Index/contact.html">联系站长</a> | 
			<a href=" https://beian.miit.gov.cn" target=_blank>湘ICP备2023001425号</a> | 
			<a href="http://www.beian.gov.cn/portal/registerSystemInfo?recordcode=43010502000604" target=_blank>网安备43010502000604</a> | 
		</div>
		</div>
	</div>


</div><!-- /wrapper-->




<!-- page specific plugin scripts -->

<!-- inline scripts related to this page -->

<div id="myModal" class="modal fade" tabindex="-1" 
			role="dialog" aria-labelledby="myModalLabel" aria-hidden="true">
	<div class="modal-dialog">
		<div class="modal-content">
			
		</div>
	</div>
</div><!-- /.modal-table -->

</body>

<script type="text/javascript">
$(document).on('click', '.list-more', function(){
	var id=$(this).attr('data-id');
	$('#list-'+id).css('max-height',$('#list-'+id)[0].scrollHeight);
	$(this).removeClass('list-more');
	$(this).addClass('list-hide');
	$(this).html('<i class="fa fa-angle-double-up"></i>');
	
	//$(this).hide();

	return false;
});

$(document).on('click', '.list-hide', function(){
	var id=$(this).attr('data-id');
	$('#list-'+id).css('max-height','100px');
	$(this).removeClass('list-hide');
	$(this).addClass('list-more');
	$(this).html('<i class="fa fa-angle-double-down"></i>');
	
	return false;
});

$("#myModal").on("hidden.bs.modal", function() {
    $(this).removeData();
});

$(document).on("click",".keyword",function(){
	var keyword=$(this).attr("keyword");
	var type_id=$(this).attr("type_id");
	if(typeof(type_id) =="undefined" || type_id =="") type_id="0";
	location.href="http://search.pudn.com/Download/index?keyword="+keyword;
	
	return false;
});
</script>
<script type="text/javascript" src="/js/time.js"></script>


<script type="text/javascript" src="/js/marked.min.js"></script>
<script type="text/javascript">
	$(document).ready(function(){
		$('.hide-list').each(function(){
			if ($(this)[0].offsetHeight < $(this)[0].scrollHeight){
				var id=$(this).attr('id');
				id =id.substring(5);
				$(this).after('<div style="text-align:center"><a href="" class="list-more" data-id="' + id + '"><i class="fa fa-angle-double-down"></i></a></div>');
			}
		});
	});
	var g_id="1528768791394989";
	var keywords =new Array();
	keywords[0] ='实例';keywords[1] ='FPGA 实例';keywords[2] ='100 power tips ';keywords[3] ='fpga 源码';keywords[4] ='fpga源码';	function get_download_user(){
		var url ="/Download/get_download_user/id/"+g_id+".html";
		$.get(url,function(ret){
			if(ret.length ==0) return;
			var html='';
			for(i in ret){
				html =html + '<a href=/User/profile/id/'+ret[i].user_new_id+'.html>'+ret[i].name+'</a> ';
			}
			$('#download-users').append(html);
		});
	}
	
	function get_relate_item(){
		var url ="/Download/get_relate_item/id/"+g_id+'.html';
		$.get(url,function(ret){
			if(ret.length ==0) return;
			var html='';
			var intro;
			for(i in ret){
				intro =ret[i].intro;
				for(j in keywords){
					var reg =new RegExp(keywords[j],'gmi');
					intro =intro.replace(reg,'<font color=brown>'+keywords[j]+'</font>');
				}
				html =html + '[<a href=/Download/item/id/'+ret[i].new_id+'.html>'+ret[i].name+'</a>]&nbsp; '+intro+'<BR>';
			}
			$('#relate-items').append(html);
		});
		
	}
	function get_score_name(score){
		switch(score){
		case '100': return '很好，推荐下载';
		case '85': return '还不错';
		case '75': return '一般，勉强可用';
		case '50': return '差';
		case '3': return '纯粹是垃圾';
		case '40': return '和说明完全不符';
		case '20': return '文件不全';
		case '10': return '不是源代码或资料';
		case '5': return '文件有密码，不知道密码';
		case '0': return '不能解压或下载失败';
		}
		return '';
	}
	function get_comment(){
		var url ="/Download/get_comments/id/"+g_id+'.html';
		$.get(url,function(ret){
			if(ret.length ==0) return;
			var total_count =ret.total_count;
			var data =ret.data;
			var html='';
			for(i in data){
				html =html + '<a href="/User/profile/id/'+data[i].user_new_id+'.html" class="uploader">'+data[i].user_name+'</a>: <span class="comment-score">'+get_score_name(data[i].score)+'</span>, '+data[i].content+'<BR>';
			}
			$('#file-comments').append(html);
		});
		
	}
	function get_favor(){
		var url ="/Download/get_item_favors/id/"+g_id+".html";
		$.get(url,function(ret){
			if(ret.length ==0) return;
			var html='';
			for(i in ret){
				html =html + '<a href=/User/profile/id/'+ret[i].user_new_id+'.html class=user>'+ret[i].name+'</a>&nbsp;';
			}
			$('#favor-users').html(html);
		});
	}
	// 得到下载这个的用户又下载了什么
	function get_more_download(){
		
	}
	// 得到下载这个的用户又搜索了什么
	function get_more_keyword(){
		
	}
	
	// 得到论坛相关问题
	function get_bbs(){
		
	}
	
	// 得到软件工场相关内容
	function get_works(){
		
	}
	
	// 得到相关聊天室
	function get_chat(){
		
	}
	
	// 得到相关软件商城信息
	function get_shop(){
		
	}
	
	// 得到job
	
	// 得到学习内容

	// 数据
	get_download_user();
	//get_relate_item();
	get_comment();
	get_favor();
	
	$('.vote-up').click(function(){
		var url="/Download/vote/t/up/id/"+g_id;
		$.get(url,function(ret){
			if(ret.status==0){
				alert(ret.info);
				if(ret.url.length >0)
					location.href=ret.url;
			}
			else{
				var s =$('#vote-up-count').html();
				if(s =='') s="0";
				var count =parseInt(s)+1;
				$('#vote-up-count').html(count);
			}
		})
		return false;
	});
	$('.vote-down').click(function(){
		var url="/Download/vote/t/down/id/"+g_id;
		$.get(url,function(ret){
			if(ret.status==0)
				alert(ret.info);
			else{
				var s =$('#vote-down-count').html();
				if(s =='') s="0";
				var count =parseInt(s)+1;
				$('#vote-down-count').html(count);
			}
		})
		return false;
	});
	$('.favor-item').click(function(){
		var url="/Favor/add/t/0/id/"+g_id;
		$.get(url,function(ret){
			if(ret.status==0){
				alert(ret.info);
			}
			else{
				var s =$('#favor-count').html();
				if(s =='') s="0";
				var count =parseInt(s)+1;
				$('#favor-count').html(count);
			}
		})
		return false;
	});
	$('.pop-a').click(function(){
		var url=$(this).attr('href');
		$.get(url,function(ret){
			alert(ret.info);
			//location.reload();
		})
		return false;
	});

document.getElementById('readme').innerHTML =marked.parse(document.getElementById('readme').innerHTML);
</script>



</html>