pl
所属分类：VHDL/FPGA/Verilog
开发工具：Verilog
文件大小：1512KB
下载次数：5
上传日期：2018-07-13 15:21:30
上 传 者：
ely332
说明： xilinx ZYNQ Ultral Scale+ 系列开发板ZCU102，基于VIVADO 在PL端的BD设计，包含三种视频接口的视频输入，同时由PS端对整个工程的IP进行配置。
(xilinx ZYNQ Ultral Scale+ ZCU102)
文件列表:
pl\zcu102_base_trd\archive_project_summary.txt (43196, 2017-10-17)
pl\zcu102_base_trd\zcu102_base_trd.cache\wt\project.wpc (62, 2017-10-17)
pl\zcu102_base_trd\zcu102_base_trd.hw\zcu102_base_trd.lpr (284, 2017-10-17)
pl\zcu102_base_trd\zcu102_base_trd.ipdefs\ip_0\clock_mux_v2_0\clock_mux.vhd (3944, 2017-10-17)
pl\zcu102_base_trd\zcu102_base_trd.ipdefs\ip_0\clock_mux_v2_0\component.xml (8952, 2017-10-17)
pl\zcu102_base_trd\zcu102_base_trd.ipdefs\ip_0\clock_mux_v2_0\xgui\clock_mux_v1_0.tcl (195, 2017-10-17)
pl\zcu102_base_trd\zcu102_base_trd.ipdefs\ip_0\hdmi_hb\component.xml (11866, 2017-10-17)
pl\zcu102_base_trd\zcu102_base_trd.ipdefs\ip_0\hdmi_hb\constrs_1\new\hdmi_hb.xdc (168, 2017-10-17)
pl\zcu102_base_trd\zcu102_base_trd.ipdefs\ip_0\hdmi_hb\constrs_1\new\hdmi_hb_ooc.xdc (267, 2017-10-17)
pl\zcu102_base_trd\zcu102_base_trd.ipdefs\ip_0\hdmi_hb\sources_1\new\hdmi_hb.v (1249, 2017-10-17)
pl\zcu102_base_trd\zcu102_base_trd.ipdefs\ip_0\hdmi_hb\xgui\hdmi_hb_v1_0.tcl (138, 2017-10-17)
pl\zcu102_base_trd\zcu102_base_trd.ipdefs\ip_0\v_demosaic_v1_0\bd\bd.tcl (120, 2017-10-17)
pl\zcu102_base_trd\zcu102_base_trd.ipdefs\ip_0\v_demosaic_v1_0\component.xml (64696, 2017-10-17)
pl\zcu102_base_trd\zcu102_base_trd.ipdefs\ip_0\v_demosaic_v1_0\doc\v_demosaic_v1_0_changelog.txt (2264, 2017-10-17)
pl\zcu102_base_trd\zcu102_base_trd.ipdefs\ip_0\v_demosaic_v1_0\hdl\v_demosaic_v1_0_rfs.v (17, 2017-10-17)
pl\zcu102_base_trd\zcu102_base_trd.ipdefs\ip_0\v_demosaic_v1_0\misc\logo.png (4077, 2017-10-17)
pl\zcu102_base_trd\zcu102_base_trd.ipdefs\ip_0\v_demosaic_v1_0\src\v_demosaic.cpp (44566, 2017-10-17)
pl\zcu102_base_trd\zcu102_base_trd.ipdefs\ip_0\v_demosaic_v1_0\src\v_demosaic.h (2451, 2017-10-17)
pl\zcu102_base_trd\zcu102_base_trd.ipdefs\ip_0\v_demosaic_v1_0\ttcl\exdes_bd_sim.ttcl (12461, 2017-10-17)
pl\zcu102_base_trd\zcu102_base_trd.ipdefs\ip_0\v_demosaic_v1_0\ttcl\exdes_bd_synth.ttcl (10786, 2017-10-17)
pl\zcu102_base_trd\zcu102_base_trd.ipdefs\ip_0\v_demosaic_v1_0\ttcl\exdes_scriptext.ttcl (709, 2017-10-17)
pl\zcu102_base_trd\zcu102_base_trd.ipdefs\ip_0\v_demosaic_v1_0\ttcl\exdes_tb_sv.ttcl (6844, 2017-10-17)
pl\zcu102_base_trd\zcu102_base_trd.ipdefs\ip_0\v_demosaic_v1_0\ttcl\exdes_top_v.ttcl (934, 2017-10-17)
pl\zcu102_base_trd\zcu102_base_trd.ipdefs\ip_0\v_demosaic_v1_0\ttcl\hls_commands.ttcl (232, 2017-10-17)
pl\zcu102_base_trd\zcu102_base_trd.ipdefs\ip_0\v_demosaic_v1_0\ttcl\test_task.sv (3707, 2017-10-17)
pl\zcu102_base_trd\zcu102_base_trd.ipdefs\ip_0\v_demosaic_v1_0\ttcl\v_demosaic_config.ttcl (1358, 2017-10-17)
pl\zcu102_base_trd\zcu102_base_trd.ipdefs\ip_0\v_demosaic_v1_0\ttcl\v_demosaic_xdc.ttcl (554, 2017-10-17)
pl\zcu102_base_trd\zcu102_base_trd.ipdefs\ip_0\v_demosaic_v1_0\xgui\v_demosaic_v1_0.tcl (1952, 2017-10-17)
pl\zcu102_base_trd\zcu102_base_trd.ipdefs\ip_0\v_gamma_lut_v1_0\bd\bd.tcl (120, 2017-10-17)
pl\zcu102_base_trd\zcu102_base_trd.ipdefs\ip_0\v_gamma_lut_v1_0\component.xml (63671, 2017-10-17)
pl\zcu102_base_trd\zcu102_base_trd.ipdefs\ip_0\v_gamma_lut_v1_0\doc\v_gamma_lut_v1_0_changelog.txt (2264, 2017-10-17)
pl\zcu102_base_trd\zcu102_base_trd.ipdefs\ip_0\v_gamma_lut_v1_0\hdl\v_gamma_lut_v1_0_rfs.v (17, 2017-10-17)
pl\zcu102_base_trd\zcu102_base_trd.ipdefs\ip_0\v_gamma_lut_v1_0\misc\logo.png (4077, 2017-10-17)
pl\zcu102_base_trd\zcu102_base_trd.ipdefs\ip_0\v_gamma_lut_v1_0\src\v_gamma_lut.cpp (8420, 2017-10-17)
pl\zcu102_base_trd\zcu102_base_trd.ipdefs\ip_0\v_gamma_lut_v1_0\src\v_gamma_lut.h (1304, 2017-10-17)
pl\zcu102_base_trd\zcu102_base_trd.ipdefs\ip_0\v_gamma_lut_v1_0\ttcl\exdes_bd_sim.ttcl (11201, 2017-10-17)
pl\zcu102_base_trd\zcu102_base_trd.ipdefs\ip_0\v_gamma_lut_v1_0\ttcl\exdes_bd_synth.ttcl (9958, 2017-10-17)
pl\zcu102_base_trd\zcu102_base_trd.ipdefs\ip_0\v_gamma_lut_v1_0\ttcl\exdes_scriptext.ttcl (709, 2017-10-17)
pl\zcu102_base_trd\zcu102_base_trd.ipdefs\ip_0\v_gamma_lut_v1_0\ttcl\exdes_tb_sv.ttcl (6584, 2017-10-17)
pl\zcu102_base_trd\zcu102_base_trd.ipdefs\ip_0\v_gamma_lut_v1_0\ttcl\exdes_top_v.ttcl (904, 2017-10-17)
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