SPI
所属分类：VHDL/FPGA/Verilog
开发工具：Verilog
文件大小：86KB
下载次数：13
上传日期：2018-07-15 20:02:22
上 传 者：
tangshunchen
说明： SPI接口测试代码 于vivado实测有效
(SPI interface test code is effectively measured in vivado)
文件列表:
SPI (0, 2018-07-11)
SPI\SPI.cache (0, 2018-07-11)
SPI\SPI.cache\wt (0, 2018-07-11)
SPI\SPI.cache\wt\java_command_handlers.wdf (525, 2017-07-03)
SPI\SPI.cache\wt\synthesis.wdf (3249, 2017-07-03)
SPI\SPI.cache\wt\synthesis_details.wdf (97, 2017-07-03)
SPI\SPI.cache\wt\webtalk_pa.xml (1569, 2017-07-03)
SPI\SPI.cache\wt\xsim.wdf (252, 2017-07-03)
SPI\SPI.runs (0, 2018-07-11)
SPI\SPI.runs\.jobs (0, 2018-07-11)
SPI\SPI.runs\.jobs\vrs_config_1.xml (233, 2017-07-03)
SPI\SPI.runs\.jobs\vrs_config_2.xml (223, 2017-07-03)
SPI\SPI.runs\synth_1 (0, 2018-07-11)
SPI\SPI.runs\synth_1\runme.log (37938, 2017-07-03)
SPI\SPI.sim (0, 2018-07-11)
SPI\SPI.sim\sim_1 (0, 2018-07-11)
SPI\SPI.sim\sim_1\behav (0, 2018-07-11)
SPI\SPI.sim\sim_1\behav\compile.bat (246, 2017-07-03)
SPI\SPI.sim\sim_1\behav\compile.log (630, 2017-07-03)
SPI\SPI.sim\sim_1\behav\elaborate.bat (377, 2017-07-03)
SPI\SPI.sim\sim_1\behav\elaborate.log (771, 2017-07-03)
SPI\SPI.sim\sim_1\behav\glbl.v (1470, 2017-07-03)
SPI\SPI.sim\sim_1\behav\simulate.bat (252, 2017-07-03)
SPI\SPI.sim\sim_1\behav\simulate.log (48, 2017-07-03)
SPI\SPI.sim\sim_1\behav\tb.tcl (449, 2017-07-03)
SPI\SPI.sim\sim_1\behav\tb_behav.wdb (34759, 2017-07-03)
SPI\SPI.sim\sim_1\behav\tb_vlog.prj (238, 2017-07-03)
SPI\SPI.sim\sim_1\behav\xelab.pb (1585, 2017-07-03)
SPI\SPI.sim\sim_1\behav\xsim.dir (0, 2018-07-11)
SPI\SPI.sim\sim_1\behav\xsim.dir\tb_behav (0, 2018-07-11)
SPI\SPI.sim\sim_1\behav\xsim.dir\tb_behav\Compile_Options.txt (221, 2017-07-03)
SPI\SPI.sim\sim_1\behav\xsim.dir\tb_behav\xsim.dbg (8640, 2017-07-03)
SPI\SPI.sim\sim_1\behav\xsim.dir\tb_behav\xsim.mem (21188, 2017-07-03)
SPI\SPI.sim\sim_1\behav\xsim.dir\tb_behav\xsim.reloc (6353, 2017-07-03)
SPI\SPI.sim\sim_1\behav\xsim.dir\tb_behav\xsim.rtti (182, 2017-07-03)
SPI\SPI.sim\sim_1\behav\xsim.dir\tb_behav\xsim.svtype (8, 2017-07-03)
SPI\SPI.sim\sim_1\behav\xsim.dir\tb_behav\xsim.type (24, 2017-07-03)
SPI\SPI.sim\sim_1\behav\xsim.dir\tb_behav\xsim.xdbg (1448, 2017-07-03)
SPI\SPI.sim\sim_1\behav\xsim.dir\tb_behav\xsimcrash.log (0, 2017-07-03)
SPI\SPI.sim\sim_1\behav\xsim.dir\tb_behav\xsimk.exe (120767, 2017-07-03)
... ...
Project Name: SPI
Vivado version: 2014.4
Description:
This is a Project of SPI Master.
A testbench is included which will have the Master generate data for sending.
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