at7_ex13
所属分类：汇编语言
开发工具：VHDL
文件大小：1106KB
下载次数：0
上传日期：2018-08-01 09:41:01
上 传 者：
gaojie123
说明： 使用verilog语言，K7的开发环境，可以实现小时分钟秒的功能实现
(The function realization of hour minute can be realized)
文件列表:
at7_ex13\at7.cache\wt\java_command_handlers.wdf (5511, 2018-02-08)
at7_ex13\at7.cache\wt\project.wpc (122, 2018-02-08)
at7_ex13\at7.cache\wt\synthesis.wdf (5232, 2018-02-04)
at7_ex13\at7.cache\wt\synthesis_details.wdf (100, 2018-02-04)
at7_ex13\at7.cache\wt\webtalk_pa.xml (5479, 2018-02-08)
at7_ex13\at7.hw\at7.lpr (343, 2017-04-01)
at7_ex13\at7.hw\hw_1\hw.xml (683, 2018-02-08)
at7_ex13\at7.hw\webtalk\.xsim_webtallk.info (59, 2017-02-22)
at7_ex13\at7.hw\webtalk\labtool_webtalk.log (372, 2017-02-22)
at7_ex13\at7.hw\webtalk\usage_statistics_ext_labtool.html (2894, 2017-02-22)
at7_ex13\at7.hw\webtalk\usage_statistics_ext_labtool.xml (2460, 2017-02-22)
at7_ex13\at7.ip_user_files\ip\clk_wiz_0\clk_wiz_0.veo (3987, 2017-02-09)
at7_ex13\at7.ip_user_files\ip\clk_wiz_0\clk_wiz_0_stub.v (1347, 2017-02-09)
at7_ex13\at7.ip_user_files\ip\clk_wiz_0\clk_wiz_0_stub.vhdl (1322, 2017-02-09)
at7_ex13\at7.ip_user_files\ipstatic\clk_wiz_v5_3_1\mmcm_pll_drp_func_7s_mmcm.vh (24240, 2017-02-07)
at7_ex13\at7.ip_user_files\ipstatic\clk_wiz_v5_3_1\mmcm_pll_drp_func_7s_pll.vh (19041, 2017-02-07)
at7_ex13\at7.ip_user_files\ipstatic\clk_wiz_v5_3_1\mmcm_pll_drp_func_us_mmcm.vh (24226, 2017-02-07)
at7_ex13\at7.ip_user_files\ipstatic\clk_wiz_v5_3_1\mmcm_pll_drp_func_us_pll.vh (22052, 2017-02-07)
at7_ex13\at7.ip_user_files\sim_scripts\clk_wiz_0\activehdl\clk_wiz_0.sh (4307, 2017-02-09)
at7_ex13\at7.ip_user_files\sim_scripts\clk_wiz_0\activehdl\clk_wiz_0.udo (0, 2017-02-09)
at7_ex13\at7.ip_user_files\sim_scripts\clk_wiz_0\activehdl\compile.do (715, 2017-02-09)
at7_ex13\at7.ip_user_files\sim_scripts\clk_wiz_0\activehdl\file_info.txt (762, 2017-02-09)
at7_ex13\at7.ip_user_files\sim_scripts\clk_wiz_0\activehdl\glbl.v (1470, 2016-06-02)
at7_ex13\at7.ip_user_files\sim_scripts\clk_wiz_0\activehdl\simulate.do (320, 2017-02-09)
at7_ex13\at7.ip_user_files\sim_scripts\clk_wiz_0\activehdl\wave.do (32, 2017-02-09)
at7_ex13\at7.ip_user_files\sim_scripts\clk_wiz_0\ies\clk_wiz_0.sh (5581, 2017-02-09)
at7_ex13\at7.ip_user_files\sim_scripts\clk_wiz_0\ies\file_info.txt (798, 2017-02-09)
at7_ex13\at7.ip_user_files\sim_scripts\clk_wiz_0\ies\glbl.v (1470, 2016-06-02)
at7_ex13\at7.ip_user_files\sim_scripts\clk_wiz_0\ies\run.f (422, 2017-02-09)
at7_ex13\at7.ip_user_files\sim_scripts\clk_wiz_0\modelsim\clk_wiz_0.sh (4611, 2017-02-09)
at7_ex13\at7.ip_user_files\sim_scripts\clk_wiz_0\modelsim\clk_wiz_0.udo (0, 2017-02-09)
at7_ex13\at7.ip_user_files\sim_scripts\clk_wiz_0\modelsim\compile.do (702, 2017-02-09)
at7_ex13\at7.ip_user_files\sim_scripts\clk_wiz_0\modelsim\file_info.txt (762, 2017-02-09)
at7_ex13\at7.ip_user_files\sim_scripts\clk_wiz_0\modelsim\glbl.v (1470, 2016-06-02)
at7_ex13\at7.ip_user_files\sim_scripts\clk_wiz_0\modelsim\simulate.do (311, 2017-02-09)
at7_ex13\at7.ip_user_files\sim_scripts\clk_wiz_0\modelsim\wave.do (32, 2017-02-09)
... ...
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