FPGA正弦信号发生器
所属分类：VHDL/FPGA/Verilog
开发工具：Verilog
文件大小：301KB
下载次数：6
上传日期：2018-10-07 15:12:54
上 传 者：
Kiven168
说明： 基于verilog hdl编写的FPGA正弦信号发生器，已测试。
(FPGA sine signal generator)
文件列表:
FPGA正弦信号发生器\cnt256.bsf (1586, 2011-04-12)
FPGA正弦信号发生器\cnt256.vhd (345, 2010-12-21)
FPGA正弦信号发生器\db\altsyncram_1ps3.tdf (3561, 2011-04-12)
FPGA正弦信号发生器\db\altsyncram_1ss3.tdf (3578, 2011-04-12)
FPGA正弦信号发生器\db\altsyncram_c371.tdf (8843, 2011-04-12)
FPGA正弦信号发生器\db\altsyncram_dps3.tdf (3567, 2011-04-20)
FPGA正弦信号发生器\db\altsyncram_edq1.tdf (5648, 2011-04-12)
FPGA正弦信号发生器\db\altsyncram_gdq1.tdf (6815, 2011-04-12)
FPGA正弦信号发生器\db\altsyncram_ggq1.tdf (17257, 2011-04-12)
FPGA正弦信号发生器\db\altsyncram_kt91.tdf (9113, 2011-04-12)
FPGA正弦信号发生器\db\altsyncram_q671.tdf (8852, 2011-04-12)
FPGA正弦信号发生器\db\altsyncram_sdq1.tdf (13745, 2011-04-20)
FPGA正弦信号发生器\db\altsyncram_vos3.tdf (3560, 2011-04-12)
FPGA正弦信号发生器\db\cmpr_5cc.tdf (1681, 2011-04-12)
FPGA正弦信号发生器\db\cmpr_8cc.tdf (1913, 2011-04-12)
FPGA正弦信号发生器\db\cmpr_9cc.tdf (2003, 2011-04-12)
FPGA正弦信号发生器\db\cntr_dai.tdf (3191, 2011-04-20)
FPGA正弦信号发生器\db\cntr_gui.tdf (3436, 2011-04-12)
FPGA正弦信号发生器\db\cntr_obi.tdf (3871, 2011-04-12)
FPGA正弦信号发生器\db\cntr_sbi.tdf (4001, 2011-04-12)
FPGA正弦信号发生器\db\cntr_u4j.tdf (4233, 2011-04-12)
FPGA正弦信号发生器\db\decode_rqf.tdf (1562, 2011-04-12)
FPGA正弦信号发生器\db\logic_util_heursitic.dat (39292, 2011-04-20)
FPGA正弦信号发生器\db\mux_9oc.tdf (4722, 2011-04-12)
FPGA正弦信号发生器\db\prev_cmp_sin.asm.qmsg (2178, 2011-04-20)
FPGA正弦信号发生器\db\prev_cmp_sin.fit.qmsg (36719, 2011-04-20)
FPGA正弦信号发生器\db\prev_cmp_sin.map.qmsg (34405, 2011-04-20)
FPGA正弦信号发生器\db\prev_cmp_sin.merge.qmsg (4767, 2011-04-20)
FPGA正弦信号发生器\db\prev_cmp_sin.qmsg (196079, 2011-04-12)
FPGA正弦信号发生器\db\prev_cmp_sin.sim.qmsg (4218, 2011-04-12)
FPGA正弦信号发生器\db\prev_cmp_sin.tan.qmsg (119201, 2011-04-20)
FPGA正弦信号发生器\db\sin.db_info (153, 2018-09-22)
FPGA正弦信号发生器\db\sin.sim.cvwf (1164, 2011-04-12)
FPGA正弦信号发生器\db\sin.sld_design_entry.sci (526, 2018-09-22)
FPGA正弦信号发生器\db\wed.wsf (3971, 2011-04-12)
FPGA正弦信号发生器\fangbo.hex (3853, 2011-04-12)
FPGA正弦信号发生器\incremental_db\compiled_partitions\sin.autoh_e4eb58185d954d358c52b26e0df67201.map.dpi (1474, 2011-04-12)
FPGA正弦信号发生器\incremental_db\compiled_partitions\sin.autoh_e4eb58185d954d358c52b26e0df67201.map.kpt (2096, 2011-04-12)
FPGA正弦信号发生器\incremental_db\compiled_partitions\sin.autoh_e4eb58185d954d358c52b26e0df67201.map.logdb (4, 2011-04-12)
FPGA正弦信号发生器\incremental_db\compiled_partitions\sin.db_info (153, 2018-09-22)
... ...
This folder contains data for incremental compilation.
The compiled_partitions sub-folder contains previous compilation results for each partition.
As long as this folder is preserved, incremental compilation results from earlier compiles
can be re-used. To perform a clean compilation from source files for all partitions, both
the db and incremental_db folder should be removed.
The imported_partitions sub-folder contains the last imported QXP for each imported partition.
As long as this folder is preserved, imported partitions will be automatically re-imported
when the db or incremental_db/compiled_partitions folders are removed.
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