Verilog数字系统设计教程(夏宇闻)

所属分类:VHDL/FPGA/Verilog
开发工具:Verilog
文件大小:19954KB
下载次数:7
上传日期:2018-11-03 10:52:42
上 传 者dou5656
说明:  本教程的目的是想通过对数字信号处理、计算(Computing) 、算法和数据结构、编程语言 和程序、体系结构和硬线逻辑等基本概念的介绍,了解算法与硬线逻辑之间的关系,从而引入利用Verilog HDL 硬件描述语言设计复杂的数字逻辑系统的概念和方法。
(The purpose of this course is to introduce digital signal processing, computing, algorithms and data structures, programming languages. With the introduction of basic concepts such as program, architecture and hard-line logic, we can understand the relationship between algorithm and hard-line logic, and then introduce the concept and method of designing complex digital logic system using Verilog HDL hardware description language.)

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Verilog数字系统设计教程(夏宇闻).pdf (21891445, 2018-03-31)

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