ECG-Verilog-FPGA

所属分类:VHDL/FPGA/Verilog
开发工具:Verilog
文件大小:265KB
下载次数:2
上传日期:2019-01-06 15:32:15
上 传 者sh-1993
说明:  一个精确的心电图系统,具有Verilog中编程的峰值检测和计数机制。
(An accurate Electro Cardio Graph system, with peak detection and counting mechanism programmed in Verilog.)

文件列表:
ADC_Driver.ngc (43140, 2019-01-06)
Comparing.v (248, 2019-01-06)
DAC_Driver.ngc (15030, 2019-01-06)
ECG.xise (40140, 2019-01-06)
ECG_main.v (3743, 2019-01-06)
ECG_summary.html (3518, 2019-01-06)
FinalProject_Report_CincottiMalhotraQuercetti.pdf (238600, 2019-01-06)
LCD_Driver_pm10to4.ngc (38735, 2019-01-06)
Module_HR_Detection.v (1335, 2019-01-06)
Module_HighPassFilter.v (636, 2019-01-06)
adc_driver.ucf (427, 2019-01-06)
bin2bcd_8_bit.v (1424, 2019-01-06)
dac_driver.ucf (344, 2019-01-06)
header_ADC_driver.v (361, 2019-01-06)
header_DAC_driver.v (842, 2019-01-06)
header_LCD_driver_pm10to4.v (277, 2019-01-06)
lcd_driver.ucf (892, 2019-01-06)
lowPassFilter.ucf (1435, 2019-01-06)
module_chipStore.v (4453, 2019-01-06)
module_counter_8_bit.v (364, 2019-01-06)
module_lowPassFilter.v (544, 2019-01-06)

# ECG-Verilog-FPGA An accurate Electro Cardio Gram system, with peak detection and counting mechanism programmed in Verilog and implimented in Xilinx-FPGA. The entire code and the analogue steps involved in heart beat processing are explained in the Final Project report (the only pdf file in this repo)

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