qianzhaowang
所属分类：VHDL/FPGA/Verilog
开发工具：Verilog
文件大小：29841KB
下载次数：12
上传日期：2019-01-21 17:18:13
上 传 者：
明月心447
说明： 一个简单的千兆以太网UDP协议的实现,可以实现数据的收发和ARP，实现PC端与FPGA的以太网通信
(A simple implementation of Gigabit Ethernet UDP protocol can realize data sending and receiving and ARP, and realize Ethernet communication between PC and FPGA.)
文件列表:
qianzhaowang\prj\1.stp (839, 2018-08-26)
qianzhaowang\prj\1_auto_stripped.stp (62063, 2018-08-26)
qianzhaowang\prj\db\add_sub_24e.tdf (1844, 2018-08-22)
qianzhaowang\prj\db\altsyncram_0v14.tdf (98743, 2018-08-23)
qianzhaowang\prj\db\altsyncram_1961.tdf (20916, 2018-08-22)
qianzhaowang\prj\db\altsyncram_1n81.tdf (23038, 2019-01-05)
qianzhaowang\prj\db\altsyncram_1v14.tdf (94447, 2018-08-23)
qianzhaowang\prj\db\altsyncram_2124.tdf (123298, 2018-08-25)
qianzhaowang\prj\db\altsyncram_2u14.tdf (26705, 2018-08-25)
qianzhaowang\prj\db\altsyncram_2v14.tdf (57931, 2018-08-23)
qianzhaowang\prj\db\altsyncram_3v14.tdf (42895, 2018-08-24)
qianzhaowang\prj\db\altsyncram_4124.tdf (124376, 2018-08-25)
qianzhaowang\prj\db\altsyncram_4r14.tdf (7484, 2018-08-24)
qianzhaowang\prj\db\altsyncram_4u14.tdf (16034, 2018-08-23)
qianzhaowang\prj\db\altsyncram_4v14.tdf (24637, 2018-08-24)
qianzhaowang\prj\db\altsyncram_5v14.tdf (24637, 2018-08-25)
qianzhaowang\prj\db\altsyncram_6fg1.tdf (43258, 2018-08-21)
qianzhaowang\prj\db\altsyncram_6u14.tdf (26785, 2018-08-23)
qianzhaowang\prj\db\altsyncram_6v14.tdf (81559, 2018-08-25)
qianzhaowang\prj\db\altsyncram_7v14.tdf (86929, 2018-08-25)
qianzhaowang\prj\db\altsyncram_8r14.tdf (9616, 2018-08-26)
qianzhaowang\prj\db\altsyncram_8u14.tdf (28933, 2018-08-24)
qianzhaowang\prj\db\altsyncram_8v14.tdf (89077, 2018-08-25)
qianzhaowang\prj\db\altsyncram_9n81.tdf (37632, 2018-08-17)
qianzhaowang\prj\db\altsyncram_9u14.tdf (29915, 2018-08-26)
qianzhaowang\prj\db\altsyncram_9v14.tdf (82345, 2018-08-26)
qianzhaowang\prj\db\altsyncram_a124.tdf (116164, 2018-08-23)
qianzhaowang\prj\db\altsyncram_a6g1.tdf (6554, 2019-01-05)
qianzhaowang\prj\db\altsyncram_a9g1.tdf (15104, 2019-01-05)
qianzhaowang\prj\db\altsyncram_ar14.tdf (10682, 2018-08-26)
qianzhaowang\prj\db\altsyncram_av14.tdf (86625, 2018-08-26)
qianzhaowang\prj\db\altsyncram_be81.tdf (5345, 2019-01-05)
qianzhaowang\prj\db\altsyncram_bv14.tdf (105885, 2018-08-26)
qianzhaowang\prj\db\altsyncram_c124.tdf (138390, 2018-08-26)
qianzhaowang\prj\db\altsyncram_ce81.tdf (12469, 2018-08-21)
qianzhaowang\prj\db\altsyncram_cfg1.tdf (47585, 2019-01-05)
qianzhaowang\prj\db\altsyncram_cu14.tdf (69745, 2018-08-26)
qianzhaowang\prj\db\altsyncram_cv14.tdf (85555, 2018-08-26)
qianzhaowang\prj\db\altsyncram_dr81.tdf (147824, 2018-08-15)
qianzhaowang\prj\db\altsyncram_dv14.tdf (47035, 2018-08-26)
... ...
This folder contains data for incremental compilation.
The compiled_partitions sub-folder contains previous compilation results for each partition.
As long as this folder is preserved, incremental compilation results from earlier compiles
can be re-used. To perform a clean compilation from source files for all partitions, both
the db and incremental_db folder should be removed.
The imported_partitions sub-folder contains the last imported QXP for each imported partition.
As long as this folder is preserved, imported partitions will be automatically re-imported
when the db or incremental_db/compiled_partitions folders are removed.
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