20190424_IP_FIFO_2_clk
所属分类：VHDL/FPGA/Verilog
开发工具：Verilog
文件大小：3890KB
下载次数：2
上传日期：2019-04-27 23:26:30
上 传 者：
Terry6
说明： 使用FPGA IP核进行不同频率的时钟进行FIFO数据读取，数据一直在写，每满8个数据，进行读取，读取速度比写入速度要快
(The FIFO data is read by using the clock of different frequency with the IP core of the FPGA. The data is written all the time. Every 8 data is read, the reading speed is faster than the writing speed.)
文件列表:
20190424_IP_FIFO_2_clk\altera_lib\altera_mf.v (2296569, 2013-10-25)
20190424_IP_FIFO_2_clk\design\fifo_ram.v (2501, 2019-04-24)
20190424_IP_FIFO_2_clk\design\fifo_ram.v.bak (0, 2019-04-19)
20190424_IP_FIFO_2_clk\ipcore\greybox_tmp\cbx_args.txt (1452, 2019-04-19)
20190424_IP_FIFO_2_clk\ipcore\ip_fifo.qip (275, 2019-04-19)
20190424_IP_FIFO_2_clk\ipcore\ip_fifo.v (7559, 2019-04-19)
20190424_IP_FIFO_2_clk\ipcore\ip_fifo_bb.v (6296, 2019-04-19)
20190424_IP_FIFO_2_clk\ipcore\ip_pll.ppf (415, 2019-04-23)
20190424_IP_FIFO_2_clk\ipcore\ip_pll.qip (360, 2019-04-23)
20190424_IP_FIFO_2_clk\ipcore\ip_pll.v (14909, 2019-04-23)
20190424_IP_FIFO_2_clk\ipcore\ip_pll_bb.v (11122, 2019-04-23)
20190424_IP_FIFO_2_clk\prj\db\.cmp.kpt (204, 2019-04-24)
20190424_IP_FIFO_2_clk\prj\db\altsyncram_2t01.tdf (13195, 2019-04-19)
20190424_IP_FIFO_2_clk\prj\db\altsyncram_i0k1.tdf (12680, 2019-04-19)
20190424_IP_FIFO_2_clk\prj\db\alt_synch_pipe_06d.tdf (2145, 2019-04-19)
20190424_IP_FIFO_2_clk\prj\db\alt_synch_pipe_v5d.tdf (2145, 2019-04-19)
20190424_IP_FIFO_2_clk\prj\db\a_dpfifo_qq31.tdf (3435, 2019-04-19)
20190424_IP_FIFO_2_clk\prj\db\a_fefifo_66f.tdf (3543, 2019-04-19)
20190424_IP_FIFO_2_clk\prj\db\a_gray2bin_qgb.tdf (1442, 2019-04-19)
20190424_IP_FIFO_2_clk\prj\db\a_graycounter_j5c.tdf (2947, 2019-04-19)
20190424_IP_FIFO_2_clk\prj\db\a_graycounter_nn6.tdf (2853, 2019-04-19)
20190424_IP_FIFO_2_clk\prj\db\cmpr_b66.tdf (1940, 2019-04-19)
20190424_IP_FIFO_2_clk\prj\db\cntr_bo7.tdf (3091, 2019-04-19)
20190424_IP_FIFO_2_clk\prj\db\cntr_vnb.tdf (3113, 2019-04-19)
20190424_IP_FIFO_2_clk\prj\db\dcfifo_4ii1.tdf (7309, 2019-04-19)
20190424_IP_FIFO_2_clk\prj\db\dffpipe_tu8.tdf (1586, 2019-04-19)
20190424_IP_FIFO_2_clk\prj\db\dffpipe_uu8.tdf (1749, 2019-04-19)
20190424_IP_FIFO_2_clk\prj\db\dffpipe_vu8.tdf (1749, 2019-04-19)
20190424_IP_FIFO_2_clk\prj\db\dpram_0711.tdf (2411, 2019-04-19)
20190424_IP_FIFO_2_clk\prj\db\fifo_ram.(0).cnf.cdb (5506, 2019-04-24)
20190424_IP_FIFO_2_clk\prj\db\fifo_ram.(0).cnf.hdb (1973, 2019-04-24)
20190424_IP_FIFO_2_clk\prj\db\fifo_ram.(1).cnf.cdb (1846, 2019-04-19)
20190424_IP_FIFO_2_clk\prj\db\fifo_ram.(1).cnf.hdb (1270, 2019-04-19)
20190424_IP_FIFO_2_clk\prj\db\fifo_ram.(10).cnf.cdb (1449, 2019-04-19)
20190424_IP_FIFO_2_clk\prj\db\fifo_ram.(10).cnf.hdb (714, 2019-04-19)
20190424_IP_FIFO_2_clk\prj\db\fifo_ram.(11).cnf.cdb (5351, 2019-04-19)
20190424_IP_FIFO_2_clk\prj\db\fifo_ram.(11).cnf.hdb (1723, 2019-04-19)
20190424_IP_FIFO_2_clk\prj\db\fifo_ram.(12).cnf.cdb (918, 2019-04-19)
20190424_IP_FIFO_2_clk\prj\db\fifo_ram.(12).cnf.hdb (565, 2019-04-19)
20190424_IP_FIFO_2_clk\prj\db\fifo_ram.(13).cnf.cdb (2527, 2019-04-19)
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This folder contains data for incremental compilation.
The compiled_partitions sub-folder contains previous compilation results for each partition.
As long as this folder is preserved, incremental compilation results from earlier compiles
can be re-used. To perform a clean compilation from source files for all partitions, both
the db and incremental_db folder should be removed.
The imported_partitions sub-folder contains the last imported QXP for each imported partition.
As long as this folder is preserved, imported partitions will be automatically re-imported
when the db or incremental_db/compiled_partitions folders are removed.
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