DE2_115_TV
所属分类：VHDL/FPGA/Verilog
开发工具：Quartus II
文件大小：697KB
下载次数：1
上传日期：2019-05-08 18:55:12
上 传 者：
流火守夜人
说明： 本演示使用DE2-115板上的VGA输出、音频编解码器和一个电视解码器（U6）播放DVD播放器的视频和音频输入。
(This demonstration plays video and audio input from a DVD player using the VGA output, audio CODEC, and one TV decoder (U6) on the DE2-115 board.)
文件列表:
DE2_115_TV (0, 2019-05-07)
DE2_115_TV\.qsys_edit (0, 2019-05-07)
DE2_115_TV\.qsys_edit\filters.xml (69, 2012-12-05)
DE2_115_TV\.qsys_edit\preferences.xml (493, 2012-12-05)
DE2_115_TV\DE2_115_TV.done (26, 2012-12-05)
DE2_115_TV\DE2_115_TV.fit.smsg (567, 2012-12-05)
DE2_115_TV\DE2_115_TV.fit.summary (646, 2012-12-05)
DE2_115_TV\DE2_115_TV.jdi (328, 2012-12-05)
DE2_115_TV\DE2_115_TV.map.summary (495, 2012-12-05)
DE2_115_TV\DE2_115_TV.pin (91000, 2012-12-05)
DE2_115_TV\DE2_115_TV.pof (8388828, 2012-12-05)
DE2_115_TV\DE2_115_TV.qpf (1281, 2012-12-05)
DE2_115_TV\DE2_115_TV.qsf (66504, 2013-01-22)
DE2_115_TV\DE2_115_TV.qws (990, 2012-12-05)
DE2_115_TV\DE2_115_TV.sof (3541365, 2012-12-05)
DE2_115_TV\DE2_115_TV.sta.summary (6620, 2012-12-05)
DE2_115_TV\DE2_115_TV.v (17481, 2012-12-11)
DE2_115_TV\DE2_115_TV_assignment_defaults.qdf (50068, 2012-12-05)
DE2_115_TV\PLLJ_PLLSPE_INFO.txt (127, 2012-12-05)
DE2_115_TV\Sdram_Control_4Port (0, 2019-05-07)
DE2_115_TV\Sdram_Control_4Port\Sdram_Control_4Port.v (14793, 2012-12-05)
DE2_115_TV\Sdram_Control_4Port\Sdram_PLL.bsf (3954, 2012-12-05)
DE2_115_TV\Sdram_Control_4Port\Sdram_PLL.ppf (499, 2012-12-05)
DE2_115_TV\Sdram_Control_4Port\Sdram_PLL.qip (367, 2012-12-05)
DE2_115_TV\Sdram_Control_4Port\Sdram_PLL.v (17431, 2012-12-05)
DE2_115_TV\Sdram_Control_4Port\Sdram_Params.h (1542, 2012-12-05)
DE2_115_TV\Sdram_Control_4Port\Sdram_RD_FIFO.qip (193, 2012-12-05)
DE2_115_TV\Sdram_Control_4Port\Sdram_RD_FIFO.v (7847, 2012-12-05)
DE2_115_TV\Sdram_Control_4Port\Sdram_RD_FIFO_wave0.jpg (145202, 2012-12-05)
DE2_115_TV\Sdram_Control_4Port\Sdram_RD_FIFO_wave1.jpg (136874, 2012-12-05)
DE2_115_TV\Sdram_Control_4Port\Sdram_RD_FIFO_waveforms.html (1130, 2012-12-05)
DE2_115_TV\Sdram_Control_4Port\Sdram_WR_FIFO.qip (193, 2012-12-05)
DE2_115_TV\Sdram_Control_4Port\Sdram_WR_FIFO.v (7847, 2012-12-05)
DE2_115_TV\Sdram_Control_4Port\Sdram_WR_FIFO_wave0.jpg (145202, 2012-12-05)
DE2_115_TV\Sdram_Control_4Port\Sdram_WR_FIFO_wave1.jpg (136874, 2012-12-05)
DE2_115_TV\Sdram_Control_4Port\Sdram_WR_FIFO_waveforms.html (1130, 2012-12-05)
DE2_115_TV\Sdram_Control_4Port\command.v (17066, 2012-12-05)
DE2_115_TV\Sdram_Control_4Port\control_interface.v (5812, 2012-12-05)
DE2_115_TV\Sdram_Control_4Port\sdr_data_path.v (909, 2012-12-05)
DE2_115_TV\altera.components (0, 2019-05-07)
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