jishuqi
所属分类：VHDL/FPGA/Verilog
开发工具：Verilog
文件大小：135KB
下载次数：1
上传日期：2019-05-17 16:49:57
上 传 者：
zqqSuarez9
说明： verilog100进制计数器，层次结构。语言或图形顶层模块。
(Verilog100 counter, hierarchy. Language or graphics top-level module.)
文件列表:
test6_3\db\jsq_10.(0).cnf.cdb (1646, 2019-05-16)
test6_3\db\jsq_10.(0).cnf.hdb (810, 2019-05-16)
test6_3\db\jsq_10.(1).cnf.cdb (1100, 2019-05-16)
test6_3\db\jsq_10.(1).cnf.hdb (727, 2019-05-16)
test6_3\db\jsq_10.cbx.xml (88, 2019-05-16)
test6_3\db\jsq_10.cmp.rdb (4269, 2019-05-16)
test6_3\db\jsq_10.cmp_merge.kpt (222, 2019-05-16)
test6_3\db\jsq_10.db_info (155, 2019-05-16)
test6_3\db\jsq_10.eda.qmsg (2745, 2019-05-16)
test6_3\db\jsq_10.hier_info (436, 2019-05-16)
test6_3\db\jsq_10.hif (499, 2019-05-16)
test6_3\db\jsq_10.ipinfo (178, 2019-05-16)
test6_3\db\jsq_10.lpc.html (372, 2019-05-16)
test6_3\db\jsq_10.lpc.rdb (414, 2019-05-16)
test6_3\db\jsq_10.lpc.txt (1060, 2019-05-16)
test6_3\db\jsq_10.map.ammdb (138, 2019-05-16)
test6_3\db\jsq_10.map.kpt (399, 2019-05-16)
test6_3\db\jsq_10.map.qmsg (4403, 2019-05-16)
test6_3\db\jsq_10.map.rdb (1202, 2019-05-16)
test6_3\db\jsq_10.map_bb.hdb (8204, 2019-05-16)
test6_3\db\jsq_10.pre_map.hdb (9481, 2019-05-16)
test6_3\db\jsq_10.pti_db_list.ddb (192, 2019-05-16)
test6_3\db\jsq_10.root_partition.map.reg_db.cdb (211, 2019-05-16)
test6_3\db\jsq_10.rtlv.hdb (9446, 2019-05-16)
test6_3\db\jsq_10.rtlv_sg.cdb (1664, 2019-05-16)
test6_3\db\jsq_10.rtlv_sg_swap.cdb (196, 2019-05-16)
test6_3\db\jsq_10.sgdiff.cdb (2674, 2019-05-16)
test6_3\db\jsq_10.sgdiff.hdb (9573, 2019-05-16)
test6_3\db\jsq_10.sld_design_entry.sci (217, 2019-05-16)
test6_3\db\jsq_10.sld_design_entry_dsc.sci (217, 2019-05-16)
test6_3\db\jsq_10.smart_action.txt (8, 2019-05-16)
test6_3\db\jsq_10.syn_hier_info (0, 2019-05-16)
test6_3\db\jsq_10.tis_db_list.ddb (232, 2019-05-16)
test6_3\db\jsq_10_qsim.cbx.xml (93, 2019-05-16)
test6_3\db\jsq_10_qsim.db_info (155, 2019-05-13)
test6_3\db\jsq_10_qsim.eds_overflow (3, 2019-05-16)
test6_3\db\jsq_10_qsim.fnsim.cdb (2754, 2019-05-16)
test6_3\db\jsq_10_qsim.fnsim.hdb (9719, 2019-05-16)
test6_3\db\jsq_10_qsim.fnsim.qmsg (3223, 2019-05-16)
test6_3\db\jsq_10_qsim.hier_info (481, 2019-05-16)
... ...
This folder contains data for incremental compilation.
The compiled_partitions sub-folder contains previous compilation results for each partition.
As long as this folder is preserved, incremental compilation results from earlier compiles
can be re-used. To perform a clean compilation from source files for all partitions, both
the db and incremental_db folder should be removed.
The imported_partitions sub-folder contains the last imported QXP for each imported partition.
As long as this folder is preserved, imported partitions will be automatically re-imported
when the db or incremental_db/compiled_partitions folders are removed.
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