ibert_7series_gth
所属分类：VHDL/FPGA/Verilog
开发工具：VHDL
文件大小：13658KB
下载次数：9
上传日期：2019-06-18 08:29:28
上 传 者：
sdersder
说明： 这是GTH高速收发器入门的最基础的例程，内部的ibert测试，配置了24个通道，每个通道的速率为10Gb/s，参考时钟为125M，不论是正常收发模式，还是loopback回环模式，都经过长达24小时的测试，误码率一直为0.
(This is the most basic routine for getting started with GTH high-speed transceivers. The internal ibert test is configured with 24 channels, each channel has a rate of 10Gb/s and the reference clock is 125M, whether it is the normal transceiver mode or the loopback loopback mode. After 24 hours of testing, the bit error rate has been 0.)
文件列表:
ibert_7series_gth_0_example\ibert_7series_gth_0_example.ip_user_files\ip\ibert_7series_gth_0\ibert_7series_gth_0.veo (3353, 2018-10-23)
ibert_7series_gth_0_example\ibert_7series_gth_0_example.ip_user_files\ip\ibert_7series_gth_0\ibert_7series_gth_0.vho (3632, 2018-10-23)
ibert_7series_gth_0_example\ibert_7series_gth_0_example.ip_user_files\mem_init_files\ibert_7series_gth_v3_0_changelog.txt (3934, 2018-10-23)
ibert_7series_gth_0_example\ibert_7series_gth_0_example.ip_user_files\sim_scripts\ibert_7series_gth_0\modelsim\filelist.f (0, 2018-10-23)
ibert_7series_gth_0_example\ibert_7series_gth_0_example.ip_user_files\sim_scripts\ibert_7series_gth_0\modelsim\file_info.txt (41, 2018-10-23)
ibert_7series_gth_0_example\ibert_7series_gth_0_example.ip_user_files\sim_scripts\ibert_7series_gth_0\modelsim\ibert_7series_gth_v3_0_changelog.txt (3934, 2018-10-23)
ibert_7series_gth_0_example\ibert_7series_gth_0_example.ip_user_files\sim_scripts\ibert_7series_gth_0\questa\filelist.f (0, 2018-10-23)
ibert_7series_gth_0_example\ibert_7series_gth_0_example.ip_user_files\sim_scripts\ibert_7series_gth_0\questa\file_info.txt (41, 2018-10-23)
ibert_7series_gth_0_example\ibert_7series_gth_0_example.ip_user_files\sim_scripts\ibert_7series_gth_0\questa\ibert_7series_gth_v3_0_changelog.txt (3934, 2018-10-23)
ibert_7series_gth_0_example\ibert_7series_gth_0_example.ip_user_files\sim_scripts\ibert_7series_gth_0\xsim\filelist.f (0, 2018-10-23)
ibert_7series_gth_0_example\ibert_7series_gth_0_example.ip_user_files\sim_scripts\ibert_7series_gth_0\xsim\file_info.txt (41, 2018-10-23)
ibert_7series_gth_0_example\ibert_7series_gth_0_example.ip_user_files\sim_scripts\ibert_7series_gth_0\xsim\ibert_7series_gth_v3_0_changelog.txt (3934, 2018-10-23)
ibert_7series_gth_0_example\ibert_7series_gth_0_example.srcs\constrs_1\imports\example_design\example_ibert_7series_gth_0.xdc (194709, 2018-10-23)
ibert_7series_gth_0_example\ibert_7series_gth_0_example.srcs\sources_1\imports\example_design\example_ibert_7series_gth_0.v (3796, 2018-10-23)
ibert_7series_gth_0_example\ibert_7series_gth_0_example.srcs\sources_1\imports\example_design\example_top_verilog.txt (28, 2018-10-23)
ibert_7series_gth_0_example\ibert_7series_gth_0_example.srcs\sources_1\imports\example_design\xdc_7ser_gth.txt (28, 2018-10-23)
ibert_7series_gth_0_example\ibert_7series_gth_0_example.srcs\sources_1\ip\ibert_7series_gth_0\blk_mem_gen_v8_3_0\hdl\blk_mem_gen_v8_3.vhd (21293, 2018-10-23)
ibert_7series_gth_0_example\ibert_7series_gth_0_example.srcs\sources_1\ip\ibert_7series_gth_0\blk_mem_gen_v8_3_0\hdl\blk_mem_gen_v8_3_vhsyn_rfs.vhd (14812258, 2018-10-23)
ibert_7series_gth_0_example\ibert_7series_gth_0_example.srcs\sources_1\ip\ibert_7series_gth_0\doc\ibert_7series_gth_v3_0_changelog.txt (3934, 2018-10-23)
ibert_7series_gth_0_example\ibert_7series_gth_0_example.srcs\sources_1\ip\ibert_7series_gth_0\fifo_generator_v13_0_0\hdl\fifo_generator_v13_0.vhd (91022, 2018-10-23)
ibert_7series_gth_0_example\ibert_7series_gth_0_example.srcs\sources_1\ip\ibert_7series_gth_0\fifo_generator_v13_0_0\hdl\fifo_generator_v13_0_vhsyn_rfs.vhd (2244147, 2018-10-23)
ibert_7series_gth_0_example\ibert_7series_gth_0_example.srcs\sources_1\ip\ibert_7series_gth_0\hdl\chipscope_icon2xsdb_mstrbr_ver_inc.v (6001, 2018-10-23)
ibert_7series_gth_0_example\ibert_7series_gth_0_example.srcs\sources_1\ip\ibert_7series_gth_0\hdl\cs_lib_function.v (4550, 2018-10-23)
ibert_7series_gth_0_example\ibert_7series_gth_0_example.srcs\sources_1\ip\ibert_7series_gth_0\hdl\cs_ver_inc.v (7233, 2018-10-23)
ibert_7series_gth_0_example\ibert_7series_gth_0_example.srcs\sources_1\ip\ibert_7series_gth_0\hdl\ibert_7series_gth.v (68595, 2018-10-23)
ibert_7series_gth_0_example\ibert_7series_gth_0_example.srcs\sources_1\ip\ibert_7series_gth_0\hdl\ibert_7series_gth_v3_0_syn_rfs.v (675388, 2018-10-23)
ibert_7series_gth_0_example\ibert_7series_gth_0_example.srcs\sources_1\ip\ibert_7series_gth_0\hdl\icon_ver_inc.v (5069, 2018-10-23)
ibert_7series_gth_0_example\ibert_7series_gth_0_example.srcs\sources_1\ip\ibert_7series_gth_0\ibert_7series_gth_0.veo (3353, 2018-10-23)
ibert_7series_gth_0_example\ibert_7series_gth_0_example.srcs\sources_1\ip\ibert_7series_gth_0\ibert_7series_gth_0.vho (3632, 2018-10-23)
ibert_7series_gth_0_example\ibert_7series_gth_0_example.srcs\sources_1\ip\ibert_7series_gth_0\ibert_7series_gth_0.xci (116262, 2018-10-23)
ibert_7series_gth_0_example\ibert_7series_gth_0_example.srcs\sources_1\ip\ibert_7series_gth_0\ibert_7series_gth_0.xml (309531, 2018-10-23)
ibert_7series_gth_0_example\ibert_7series_gth_0_example.srcs\sources_1\ip\ibert_7series_gth_0\synth\ibert_7series_gth_0.v (41799, 2018-10-23)
ibert_7series_gth_0_example\ibert_7series_gth_0_example.xpr (7168, 2018-12-18)
ibert_7series_gth_0_example\ibert_7series_gth_0_example.srcs\sources_1\ip\ibert_7series_gth_0\blk_mem_gen_v8_3_0\hdl (0, 2018-12-16)
ibert_7series_gth_0_example\ibert_7series_gth_0_example.srcs\sources_1\ip\ibert_7series_gth_0\fifo_generator_v13_0_0\hdl (0, 2018-12-16)
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