H.264decodeVerilog
所属分类：VHDL/FPGA/Verilog
开发工具：VHDL
文件大小：862KB
下载次数：31
上传日期：2011-06-19 02:38:59
上 传 者：
Hi生先
说明： 基于FPGA的EDA设计技术，用Verilog硬件设计语言解压缩H.264格式的视频压缩文件。
(FPGA-based EDA design, using Verilog hardware design language decompress H.264 video compression format file.)
文件列表:
rev_1\Intra_pred_PE.areasrr (10382, 2009-02-22)
rev_1\Intra_pred_PE.edn (2895545, 2009-02-22)
rev_1\Intra_pred_PE.fse (0, 2009-02-22)
rev_1\Intra_pred_PE.sdf (2146875, 2009-02-22)
rev_1\Intra_pred_PE.srd (1080554, 2009-02-22)
rev_1\Intra_pred_PE.srm (1683261, 2009-02-22)
rev_1\Intra_pred_PE.srr (35658, 2009-02-22)
rev_1\Intra_pred_PE.srs (105155, 2009-02-22)
rev_1\Intra_pred_PE.tlg (418, 2009-02-22)
rev_1\Intra_pred_PE_sdc.sdc (310, 2009-02-22)
rev_1\syntmp\Intra_pred_PE.msg (0, 2009-02-22)
rev_1\syntmp\Intra_pred_PE.plg (441, 2009-02-22)
work\@inter_pred_reg_ctrl\_primary.dat (74956, 2009-02-24)
work\@inter_pred_reg_ctrl\_primary.vhd (11261, 2009-02-24)
work\@intra4x4_@pred@mode_decoding\verilog.asm (50780, 2009-02-21)
work\@intra4x4_@pred@mode_decoding\_primary.dat (7459, 2009-02-21)
work\@intra4x4_@pred@mode_decoding\_primary.vhd (1259, 2009-02-21)
work\@intra_pred_@p@e\verilog.asm (282395, 2009-02-24)
work\@intra_pred_@p@e\_primary.dat (40305, 2009-02-24)
work\@intra_pred_@p@e\_primary.vhd (5109, 2009-02-24)
work\@intra_pred_pipeline\_primary.dat (15439, 2009-02-26)
work\@intra_pred_pipeline\_primary.vhd (3822, 2009-02-26)
work\@intra_pred_reg_ctrl\_primary.dat (17797, 2009-02-26)
work\@intra_pred_reg_ctrl\_primary.vhd (4766, 2009-02-26)
work\@intra_pred_top\verilog.asm (62473, 2009-02-22)
work\@intra_pred_top\_primary.dat (9022, 2009-02-19)
work\@intra_pred_top\_primary.vhd (3108, 2009-02-22)
work\@p@e\verilog.asm (15903, 2009-02-24)
work\@p@e\_primary.dat (1271, 2009-02-24)
work\@p@e\_primary.vhd (902, 2009-02-24)
work\main_seed_precomputation\_primary.dat (986, 2009-02-26)
work\main_seed_precomputation\_primary.vhd (419, 2009-02-26)
work\plane_@h@v_precomputation\_primary.dat (1430, 2009-02-26)
work\plane_@h@v_precomputation\_primary.vhd (749, 2009-02-26)
work\plane_a_precomputation\_primary.dat (328, 2009-02-26)
work\plane_a_precomputation\_primary.vhd (307, 2009-02-26)
work\plane_bc_precomputation\_primary.dat (687, 2009-02-26)
work\plane_bc_precomputation\_primary.vhd (291, 2009-02-26)
work\ram_sync_1r_sync_1w\_primary.dat (1775, 2009-02-26)
work\ram_sync_1r_sync_1w\_primary.vhd (585, 2009-02-26)
... ...
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