高速DA数模转换模块(DAC900E)
所属分类：其他
开发工具：Others
文件大小：2340KB
下载次数：5
上传日期：2019-11-18 20:56:05
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十安知非
说明： 高速DA数模转换模块（DAC900E）用户手册，以及此模块的原理图和布线图。
(User manual of high speed Da digital to analog conversion module (dac900e), and schematic diagram and wiring diagram of this module.)
文件列表:
高速DA数模转换模块(DAC900E)(10Bit,165MSPS)(FPGA或单片机外围模块)\DA(DAC900E)模块(原理图).pdf (258426, 2013-06-05)
高速DA数模转换模块(DAC900E)(10Bit,165MSPS)(FPGA或单片机外围模块)\DA(DAC900E)模块(布线图).pdf (153959, 2013-06-05)
高速DA数模转换模块(DAC900E)(10Bit,165MSPS)(FPGA或单片机外围模块)\da1_test(Altera_Verilog)\da1_test.asm.rpt (7568, 2013-06-20)
高速DA数模转换模块(DAC900E)(10Bit,165MSPS)(FPGA或单片机外围模块)\da1_test(Altera_Verilog)\da1_test.done (26, 2013-06-20)
高速DA数模转换模块(DAC900E)(10Bit,165MSPS)(FPGA或单片机外围模块)\da1_test(Altera_Verilog)\da1_test.fit.rpt (97371, 2013-06-20)
高速DA数模转换模块(DAC900E)(10Bit,165MSPS)(FPGA或单片机外围模块)\da1_test(Altera_Verilog)\da1_test.fit.smsg (411, 2013-06-20)
高速DA数模转换模块(DAC900E)(10Bit,165MSPS)(FPGA或单片机外围模块)\da1_test(Altera_Verilog)\da1_test.fit.summary (409, 2013-06-20)
高速DA数模转换模块(DAC900E)(10Bit,165MSPS)(FPGA或单片机外围模块)\da1_test(Altera_Verilog)\da1_test.flow.rpt (6989, 2013-06-20)
高速DA数模转换模块(DAC900E)(10Bit,165MSPS)(FPGA或单片机外围模块)\da1_test(Altera_Verilog)\da1_test.map.rpt (16897, 2013-06-20)
高速DA数模转换模块(DAC900E)(10Bit,165MSPS)(FPGA或单片机外围模块)\da1_test(Altera_Verilog)\da1_test.map.summary (317, 2013-06-20)
高速DA数模转换模块(DAC900E)(10Bit,165MSPS)(FPGA或单片机外围模块)\da1_test(Altera_Verilog)\da1_test.pin (30973, 2013-06-20)
高速DA数模转换模块(DAC900E)(10Bit,165MSPS)(FPGA或单片机外围模块)\da1_test(Altera_Verilog)\da1_test.pof (131258, 2013-06-20)
高速DA数模转换模块(DAC900E)(10Bit,165MSPS)(FPGA或单片机外围模块)\da1_test(Altera_Verilog)\da1_test.qpf (1262, 2010-07-18)
高速DA数模转换模块(DAC900E)(10Bit,165MSPS)(FPGA或单片机外围模块)\da1_test(Altera_Verilog)\da1_test.qsf (3709, 2013-06-20)
高速DA数模转换模块(DAC900E)(10Bit,165MSPS)(FPGA或单片机外围模块)\da1_test(Altera_Verilog)\da1_test.qws (579, 2013-06-20)
高速DA数模转换模块(DAC900E)(10Bit,165MSPS)(FPGA或单片机外围模块)\da1_test(Altera_Verilog)\da1_test.sof (140505, 2013-06-20)
高速DA数模转换模块(DAC900E)(10Bit,165MSPS)(FPGA或单片机外围模块)\da1_test(Altera_Verilog)\da1_test.tan.rpt (40711, 2013-06-20)
高速DA数模转换模块(DAC900E)(10Bit,165MSPS)(FPGA或单片机外围模块)\da1_test(Altera_Verilog)\da1_test.tan.summary (1217, 2013-06-20)
高速DA数模转换模块(DAC900E)(10Bit,165MSPS)(FPGA或单片机外围模块)\da1_test(Altera_Verilog)\da1_test.v (785, 2011-04-01)
高速DA数模转换模块(DAC900E)(10Bit,165MSPS)(FPGA或单片机外围模块)\da1_test(Altera_Verilog)\db\da1_test.(0).cnf.cdb (1784, 2013-06-20)
高速DA数模转换模块(DAC900E)(10Bit,165MSPS)(FPGA或单片机外围模块)\da1_test(Altera_Verilog)\db\da1_test.(0).cnf.hdb (1287, 2013-06-20)
高速DA数模转换模块(DAC900E)(10Bit,165MSPS)(FPGA或单片机外围模块)\da1_test(Altera_Verilog)\db\da1_test.asm.qmsg (2007, 2013-06-20)
高速DA数模转换模块(DAC900E)(10Bit,165MSPS)(FPGA或单片机外围模块)\da1_test(Altera_Verilog)\db\da1_test.cbx.xml (90, 2013-06-20)
高速DA数模转换模块(DAC900E)(10Bit,165MSPS)(FPGA或单片机外围模块)\da1_test(Altera_Verilog)\db\da1_test.cmp.bpm (561, 2013-06-20)
高速DA数模转换模块(DAC900E)(10Bit,165MSPS)(FPGA或单片机外围模块)\da1_test(Altera_Verilog)\db\da1_test.cmp.cdb (6948, 2013-06-20)
高速DA数模转换模块(DAC900E)(10Bit,165MSPS)(FPGA或单片机外围模块)\da1_test(Altera_Verilog)\db\da1_test.cmp.ecobp (28, 2013-06-20)
高速DA数模转换模块(DAC900E)(10Bit,165MSPS)(FPGA或单片机外围模块)\da1_test(Altera_Verilog)\db\da1_test.cmp.hdb (7577, 2013-06-20)
高速DA数模转换模块(DAC900E)(10Bit,165MSPS)(FPGA或单片机外围模块)\da1_test(Altera_Verilog)\db\da1_test.cmp.kpt (339, 2013-06-20)
高速DA数模转换模块(DAC900E)(10Bit,165MSPS)(FPGA或单片机外围模块)\da1_test(Altera_Verilog)\db\da1_test.cmp.logdb (4, 2013-06-20)
高速DA数模转换模块(DAC900E)(10Bit,165MSPS)(FPGA或单片机外围模块)\da1_test(Altera_Verilog)\db\da1_test.cmp.rdb (17461, 2013-06-20)
高速DA数模转换模块(DAC900E)(10Bit,165MSPS)(FPGA或单片机外围模块)\da1_test(Altera_Verilog)\db\da1_test.cmp.tdb (5819, 2013-06-20)
高速DA数模转换模块(DAC900E)(10Bit,165MSPS)(FPGA或单片机外围模块)\da1_test(Altera_Verilog)\db\da1_test.cmp0.ddb (22192, 2013-06-20)
高速DA数模转换模块(DAC900E)(10Bit,165MSPS)(FPGA或单片机外围模块)\da1_test(Altera_Verilog)\db\da1_test.cmp_merge.kpt (345, 2013-06-20)
高速DA数模转换模块(DAC900E)(10Bit,165MSPS)(FPGA或单片机外围模块)\da1_test(Altera_Verilog)\db\da1_test.db_info (137, 2010-07-18)
高速DA数模转换模块(DAC900E)(10Bit,165MSPS)(FPGA或单片机外围模块)\da1_test(Altera_Verilog)\db\da1_test.eco.cdb (161, 2013-06-20)
高速DA数模转换模块(DAC900E)(10Bit,165MSPS)(FPGA或单片机外围模块)\da1_test(Altera_Verilog)\db\da1_test.fit.qmsg (32291, 2013-06-20)
高速DA数模转换模块(DAC900E)(10Bit,165MSPS)(FPGA或单片机外围模块)\da1_test(Altera_Verilog)\db\da1_test.hier_info (1522, 2013-06-20)
高速DA数模转换模块(DAC900E)(10Bit,165MSPS)(FPGA或单片机外围模块)\da1_test(Altera_Verilog)\db\da1_test.hif (747, 2013-06-20)
高速DA数模转换模块(DAC900E)(10Bit,165MSPS)(FPGA或单片机外围模块)\da1_test(Altera_Verilog)\db\da1_test.lpc.html (430, 2013-06-20)
高速DA数模转换模块(DAC900E)(10Bit,165MSPS)(FPGA或单片机外围模块)\da1_test(Altera_Verilog)\db\da1_test.lpc.rdb (385, 2013-06-20)
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This folder contains data for incremental compilation.
The compiled_partitions sub-folder contains previous compilation results for each partition.
As long as this folder is preserved, incremental compilation results from earlier compiles
can be re-used. To perform a clean compilation from source files for all partitions, both
the db and incremental_db folder should be removed.
The imported_partitions sub-folder contains the last imported QXP for each imported partition.
As long as this folder is preserved, imported partitions will be automatically re-imported
when the db or incremental_db/compiled_partitions folders are removed.
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