FPGAverilog串口IICSPI
所属分类：串口编程
开发工具：Vivado
文件大小：141KB
下载次数：6
上传日期：2019-12-02 10:01:29
上 传 者：
HeLeiXing
说明： FPGA verilog 学习资料，包括verilog 语言入门，基础语法，串口 IIC SPI发送接收，适合在VIVADO上运行。
(FPGA Verilog learning materials, including the introduction of Verilog language, basic syntax, serial port sending and receiving,IIC SPI , etc., suitable for running on vivado.)
文件列表:
Chapter_8\I2C\I2C.cache\wt\java_command_handlers.wdf (403, 2017-07-02)
Chapter_8\I2C\I2C.cache\wt\webtalk_pa.xml (1512, 2017-07-02)
Chapter_8\I2C\I2C.cache\wt\xsim.wdf (252, 2017-07-02)
Chapter_8\I2C\I2C.sim\sim_1\behav\compile.bat (246, 2017-07-02)
Chapter_8\I2C\I2C.sim\sim_1\behav\compile.log (443, 2017-07-02)
Chapter_8\I2C\I2C.sim\sim_1\behav\elaborate.bat (377, 2017-07-02)
Chapter_8\I2C\I2C.sim\sim_1\behav\elaborate.log (728, 2017-07-02)
Chapter_8\I2C\I2C.sim\sim_1\behav\glbl.v (1470, 2017-07-02)
Chapter_8\I2C\I2C.sim\sim_1\behav\simulate.bat (252, 2017-07-02)
Chapter_8\I2C\I2C.sim\sim_1\behav\simulate.log (48, 2017-07-02)
Chapter_8\I2C\I2C.sim\sim_1\behav\tb.tcl (449, 2017-07-02)
Chapter_8\I2C\I2C.sim\sim_1\behav\tb_behav.wdb (11754, 2017-07-02)
Chapter_8\I2C\I2C.sim\sim_1\behav\tb_vlog.prj (167, 2017-07-02)
Chapter_8\I2C\I2C.sim\sim_1\behav\xelab.pb (1479, 2017-07-02)
Chapter_8\I2C\I2C.sim\sim_1\behav\xsim.dir\tb_behav\Compile_Options.txt (221, 2017-07-02)
Chapter_8\I2C\I2C.sim\sim_1\behav\xsim.dir\tb_behav\xsim.dbg (6568, 2017-07-02)
Chapter_8\I2C\I2C.sim\sim_1\behav\xsim.dir\tb_behav\xsim.mem (13596, 2017-07-02)
Chapter_8\I2C\I2C.sim\sim_1\behav\xsim.dir\tb_behav\xsim.reloc (3937, 2017-07-02)
Chapter_8\I2C\I2C.sim\sim_1\behav\xsim.dir\tb_behav\xsim.rtti (182, 2017-07-02)
Chapter_8\I2C\I2C.sim\sim_1\behav\xsim.dir\tb_behav\xsim.svtype (8, 2017-07-02)
Chapter_8\I2C\I2C.sim\sim_1\behav\xsim.dir\tb_behav\xsim.type (24, 2017-07-02)
Chapter_8\I2C\I2C.sim\sim_1\behav\xsim.dir\tb_behav\xsim.xdbg (776, 2017-07-02)
Chapter_8\I2C\I2C.sim\sim_1\behav\xsim.dir\tb_behav\xsimcrash.log (0, 2017-07-02)
Chapter_8\I2C\I2C.sim\sim_1\behav\xsim.dir\tb_behav\xsimk.exe (115131, 2017-07-02)
Chapter_8\I2C\I2C.sim\sim_1\behav\xsim.dir\tb_behav\xsimkernel.log (311, 2017-07-02)
Chapter_8\I2C\I2C.sim\sim_1\behav\xsim.dir\xil_defaultlib\glbl.sdb (3631, 2017-07-02)
Chapter_8\I2C\I2C.sim\sim_1\behav\xsim.dir\xil_defaultlib\tb.sdb (2989, 2017-07-02)
Chapter_8\I2C\I2C.sim\sim_1\behav\xsim.dir\xsim.svtype (8, 2017-07-02)
Chapter_8\I2C\I2C.sim\sim_1\behav\xvlog.pb (769, 2017-07-02)
Chapter_8\I2C\I2C.srcs\sim_1\new\tb.v (1878, 2017-07-02)
Chapter_8\I2C\I2C.xpr (3590, 2017-07-02)
Chapter_8\ps2_keyboard\ps2_keyboard.cache\wt\java_command_handlers.wdf (147, 2017-07-02)
Chapter_8\ps2_keyboard\ps2_keyboard.cache\wt\webtalk_pa.xml (1388, 2017-07-02)
Chapter_8\ps2_keyboard\ps2_keyboard.srcs\sources_1\new\ps2_keyboard.v (1475, 2017-07-02)
Chapter_8\ps2_keyboard\ps2_keyboard.xpr (3686, 2017-07-02)
Chapter_8\SPI\SPI.cache\wt\java_command_handlers.wdf (525, 2017-07-02)
Chapter_8\SPI\SPI.cache\wt\synthesis.wdf (3249, 2017-07-02)
Chapter_8\SPI\SPI.cache\wt\synthesis_details.wdf (97, 2017-07-02)
Chapter_8\SPI\SPI.cache\wt\webtalk_pa.xml (1569, 2017-07-02)
... ...
Project Name: SPI
Vivado version: 2014.4
Description:
This is a Project of SPI Master.
A testbench is included which will have the Master generate data for sending.
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