design
所属分类：VHDL/FPGA/Verilog
开发工具：Verilog
文件大小：23159KB
下载次数：2
上传日期：2020-01-08 16:23:44
上 传 者：
ABUJBUB
说明： 利用Verilog实现。可用串口通信进行调试，实现AM调制及解调，烧入板子可用。
(It can be debugged by serial communication, realize AM modulation and demodulation, and burn in board is available.)
文件列表:
test_ADDA_sin\Chain2.cdf (380, 2017-06-06)
test_ADDA_sin\clk2.ppf (424, 2017-06-27)
test_ADDA_sin\clk2.qip (440, 2017-06-27)
test_ADDA_sin\clk2.v (16013, 2017-06-27)
test_ADDA_sin\clk2_bb.v (11995, 2017-06-27)
test_ADDA_sin\clk2_inst.v (84, 2017-06-27)
test_ADDA_sin\db\abs_divider_4dg.tdf (4242, 2017-06-29)
test_ADDA_sin\db\add_sub_ffe.tdf (1802, 2017-06-28)
test_ADDA_sin\db\add_sub_gsb.tdf (1373, 2017-06-28)
test_ADDA_sin\db\add_sub_njg.tdf (1420, 2017-06-28)
test_ADDA_sin\db\add_sub_pqa.tdf (1462, 2017-06-28)
test_ADDA_sin\db\add_sub_unc.tdf (1732, 2017-06-29)
test_ADDA_sin\db\add_sub_vnc.tdf (1877, 2017-06-29)
test_ADDA_sin\db\altsyncram_2e71.tdf (13601, 2017-06-29)
test_ADDA_sin\db\altsyncram_h781.tdf (13668, 2017-06-28)
test_ADDA_sin\db\altsyncram_rs14.tdf (26784, 2017-07-13)
test_ADDA_sin\db\alt_u_div_16f.tdf (56606, 2017-07-09)
test_ADDA_sin\db\alt_u_div_36f.tdf (58634, 2017-07-09)
test_ADDA_sin\db\alt_u_div_n8f.tdf (63353, 2017-06-29)
test_ADDA_sin\db\alt_u_div_p5f.tdf (48207, 2017-07-09)
test_ADDA_sin\db\alt_u_div_p8f.tdf (65266, 2017-06-29)
test_ADDA_sin\db\alt_u_div_r8f.tdf (67178, 2017-06-29)
test_ADDA_sin\db\alt_u_div_t8f.tdf (70965, 2017-06-29)
test_ADDA_sin\db\clk2_altpll.v (4132, 2017-07-13)
test_ADDA_sin\db\cmpr_efc.tdf (1683, 2017-07-13)
test_ADDA_sin\db\cmpr_hfc.tdf (1915, 2017-07-13)
test_ADDA_sin\db\cmpr_ifc.tdf (2005, 2017-07-13)
test_ADDA_sin\db\cntr_2fi.tdf (3863, 2017-07-13)
test_ADDA_sin\db\cntr_5fi.tdf (3732, 2017-07-13)
test_ADDA_sin\db\cntr_95j.tdf (3565, 2017-07-13)
test_ADDA_sin\db\cntr_p1j.tdf (3297, 2017-07-13)
test_ADDA_sin\db\decode_4uf.tdf (1564, 2017-07-13)
test_ADDA_sin\db\logic_util_heursitic.dat (187572, 2017-07-11)
test_ADDA_sin\db\lpm_abs_9v9.tdf (1820, 2017-06-29)
test_ADDA_sin\db\lpm_abs_av9.tdf (1820, 2017-06-29)
test_ADDA_sin\db\lpm_divide_01p.tdf (1966, 2017-06-29)
test_ADDA_sin\db\lpm_divide_5jm.tdf (1948, 2017-06-29)
test_ADDA_sin\db\lpm_divide_6jm.tdf (1948, 2017-06-29)
test_ADDA_sin\db\lpm_divide_7jm.tdf (1948, 2017-06-29)
test_ADDA_sin\db\lpm_divide_mhm.tdf (1943, 2017-07-09)
... ...
This folder contains data for incremental compilation.
The compiled_partitions sub-folder contains previous compilation results for each partition.
As long as this folder is preserved, incremental compilation results from earlier compiles
can be re-used. To perform a clean compilation from source files for all partitions, both
the db and incremental_db folder should be removed.
The imported_partitions sub-folder contains the last imported QXP for each imported partition.
As long as this folder is preserved, imported partitions will be automatically re-imported
when the db or incremental_db/compiled_partitions folders are removed.
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