DisplayPort Link training optimization
所属分类:VHDL/FPGA/Verilog
开发工具:C/C++
文件大小:1903KB
下载次数:5
上传日期:2020-01-16 23:33:53
上 传 者:
jonathanhe
说明: 介绍了Displayport规格中lind training的背景研究,设计和实现。
(As the requirement for bandwidth continues to increase in the video market, retaining
the signal integrity becomes increasingly more difficult. For many of todays
commonly used video interfaces, there are devices that can be used to assist in this
matter. However, the use of such a device is only partially documented in the DisplayPort
specification for the receiving image device, which means that the receiving
side of the video link is free to choose its own implementation. This report presents,
together with background research and design decisions, a suggestion for such an
implementation. This implementation would need to be compatible towards a wide
range of possible video Source devices and DisplayPort cables.)
文件列表:
DisplayPort Link training optimization.pdf (2021804, 2020-01-10)
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