uartverilog
所属分类：VHDL/FPGA/Verilog
开发工具：VHDL
文件大小：305KB
下载次数：17
上传日期：2011-06-25 17:05:45
上 传 者：
cpu_amd
说明： 这是基于BJ-EPM240学习开发板的串口通信实验程序
(This study is based on BJ-EPM240 development board serial communication experiment program)
文件列表:
uartverilog\db\logic_util_heursitic.dat (4752, 2009-12-15)
uartverilog\db\my_uart_top.(0).cnf.cdb (1551, 2009-12-15)
uartverilog\db\my_uart_top.(0).cnf.hdb (969, 2009-12-15)
uartverilog\db\my_uart_top.(1).cnf.cdb (2321, 2009-12-15)
uartverilog\db\my_uart_top.(1).cnf.hdb (831, 2009-12-15)
uartverilog\db\my_uart_top.(2).cnf.cdb (4665, 2009-12-15)
uartverilog\db\my_uart_top.(2).cnf.hdb (1161, 2009-12-15)
uartverilog\db\my_uart_top.(3).cnf.cdb (3096, 2009-12-15)
uartverilog\db\my_uart_top.(3).cnf.hdb (1084, 2009-12-15)
uartverilog\db\my_uart_top.asm.qmsg (2208, 2009-12-15)
uartverilog\db\my_uart_top.asm.rdb (1293, 2009-12-15)
uartverilog\db\my_uart_top.asm_labs.ddb (1742, 2009-12-15)
uartverilog\db\my_uart_top.cbx.xml (93, 2009-12-15)
uartverilog\db\my_uart_top.cmp.cdb (25554, 2009-12-15)
uartverilog\db\my_uart_top.cmp.hdb (11124, 2009-12-15)
uartverilog\db\my_uart_top.cmp.kpt (199, 2009-12-15)
uartverilog\db\my_uart_top.cmp.logdb (4, 2009-12-15)
uartverilog\db\my_uart_top.cmp.rdb (15116, 2009-12-15)
uartverilog\db\my_uart_top.cmp.tdb (20479, 2009-12-15)
uartverilog\db\my_uart_top.cmp0.ddb (47308, 2009-12-15)
uartverilog\db\my_uart_top.db_info (136, 2009-12-15)
uartverilog\db\my_uart_top.eco.cdb (160, 2009-12-15)
uartverilog\db\my_uart_top.fit.qmsg (14098, 2009-12-15)
uartverilog\db\my_uart_top.hier_info (5875, 2009-12-15)
uartverilog\db\my_uart_top.hif (2416, 2009-12-15)
uartverilog\db\my_uart_top.lpc.html (1980, 2009-12-15)
uartverilog\db\my_uart_top.lpc.rdb (482, 2009-12-15)
uartverilog\db\my_uart_top.lpc.txt (2130, 2009-12-15)
uartverilog\db\my_uart_top.map.cdb (9248, 2009-12-15)
uartverilog\db\my_uart_top.map.hdb (10610, 2009-12-15)
uartverilog\db\my_uart_top.map.logdb (4, 2009-12-15)
uartverilog\db\my_uart_top.map.qmsg (7799, 2009-12-15)
uartverilog\db\my_uart_top.pre_map.cdb (8071, 2009-12-15)
uartverilog\db\my_uart_top.pre_map.hdb (9833, 2009-12-15)
uartverilog\db\my_uart_top.rpp.qmsg (1833, 2009-12-15)
uartverilog\db\my_uart_top.rtlv.hdb (9794, 2009-12-15)
uartverilog\db\my_uart_top.rtlv_sg.cdb (7902, 2009-12-15)
uartverilog\db\my_uart_top.rtlv_sg_swap.cdb (841, 2009-12-15)
uartverilog\db\my_uart_top.sgate.rvd (8355, 2009-12-15)
uartverilog\db\my_uart_top.sgate_sm.rvd (219, 2009-12-15)
... ...
This folder contains data for incremental compilation.
The compiled_partitions sub-folder contains previous compilation results for each partition.
As long as this folder is preserved, incremental compilation results from earlier compiles
can be re-used. To perform a clean compilation from source files for all partitions, both
the db and incremental_db folder should be removed.
The imported_partitions sub-folder contains the last imported QXP for each imported partition.
As long as this folder is preserved, imported partitions will be automatically re-imported
when the db or incremental_db/compiled_partitions folders are removed.
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